A passive and low-complexity Compressed Sensing architecture based on a charge-redistribution SAR ADC

Paolino, Carmine; Prono, Luciano; Pareschi, Fabio; Mangia, Mauro; Rovatti, Riccardo; Setti, Gianluca

doi:10.1016/j.vlsi.2020.05.007

Cited by 3 publications

(1 citation statement)

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“…The accuracy of many analog data processing systems, including Analog-to-Digital converters, can be traced back to the reliable storage of analog quantities over time. For slowly varying signals, or in applications where several signal samples have to be collected before processing, leakage phenomena may cause a decay of the stored information and dramatic worsening of system performance [1]- [3].…”

Section: Introductionmentioning

confidence: 99%

Stability and Mismatch Robustness of a Leakage Current Cancellation Technique

Paolino

Pareschi

Rovatti

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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Leakage discharge currents represent one of the most detrimental factors for the maximum hold time in analog sample-and-hold circuits. Apart from the obvious passive solution of enlarging the sampling capacitor, alternatives based on active circuits have been proposed. We focus here on an existing solution which has proven to be effective in reducing the leakage discharge, hence extending the hold time, by a factor of 20. Being based on a feedback circuit built around the hold capacitor, it is paramount to understand its stability properties. This work tries to close the gap by analyzing the closed-loop stability of the nominal circuit. Classical control systems techniques are employed to thoroughly analyze the dynamic behaviour of the feedback circuit, highlighting the detrimental effect of device mismatches.

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Section: Introductionmentioning

confidence: 99%