A Power- and Performance-Aware Software Framework for Control System Applications

Giardino, Michael; Klawitter, Eric; Ferri, Bonnie; Ferri, Antonio

doi:10.1109/tc.2020.2978468

Cited by 4 publications

(9 citation statements)

References 53 publications

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“…The 2QoSM described in this work was designed as a drop-in replacement for a situation-aware governor [45]. We make use of the framework and experimental platform to demonstrate both the ease of replacing the power manager, as well as the improvements of the Q-learner over a simple governor.…”

Section: Modern Power Managersmentioning

confidence: 99%

“…It consists of three primary components: compute-aware applications, hardware abstraction layer and a quality of service manager. As discussed in Section 2, the middleware is based upon the work presented in [45] and differs primarily in abstraction level, discussed below.…”

Section: Software Architecturementioning

confidence: 99%

“…The ODROID XU4 is build around a Samsung Exynos5422, an ARM big.LITTLE processor. The XU3 and XU4 are very similar and have been used extensively as a test platform in previous research into intelligent power management [39,[43][44][45]53,65]. The ARM big.LITTLE heterogeneous multiprocessing architecture (HMP) consists of two clusters of cores: four high performance, higher-power Cortex-A15 cores and four lower-performance, lower-power Cortex-A7 cores.…”

Section: Experimental Platformmentioning

confidence: 99%

“…The 2QoSM was written as a drop-in replacement for the situation-aware governor [45]. Rather than using an existing Q-learning library (e.g., pytorch [70]), we implemented the Q-Learner in C using the GNU Scientific Library (GSL) [71].…”

Section: Quality-of-service Manager Implementationmentioning

confidence: 99%

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Low-Overhead Reinforcement Learning-Based Power Management Using 2QoSM

Giardino

Schwyn

Ferri

et al. 2022

JLPEA

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With the computational systems of even embedded devices becoming ever more powerful, there is a need for more effective and pro-active methods of dynamic power management. The work presented in this paper demonstrates the effectiveness of a reinforcement-learning based dynamic power manager placed in a software framework. This combination of Q-learning for determining policy and the software abstractions provide many of the benefits of co-design, namely, good performance, responsiveness and application guidance, with the flexibility of easily changing policies or platforms. The Q-learning based Quality of Service Manager (2QoSM) is implemented on an autonomous robot built on a complex, powerful embedded single-board computer (SBC) and a high-resolution path-planning algorithm. We find that the 2QoSM reduces power consumption up to 42% compared to the Linux on-demand governor and 10.2% over a state-of-the-art situation aware governor. Moreover, the performance as measured by path error is improved by up to 6.1%, all while saving power.

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Section: Modern Power Managersmentioning

confidence: 99%

Section: Software Architecturementioning

confidence: 99%

Section: Experimental Platformmentioning

confidence: 99%

Section: Quality-of-service Manager Implementationmentioning

confidence: 99%

See 2 more Smart Citations

Low-Overhead Reinforcement Learning-Based Power Management Using 2QoSM

Giardino

Schwyn

Ferri

et al. 2022

JLPEA

Self Cite

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“…Xu et al argue for a centralized power management agent [46,47] which decides when devices should switch between the discrete enabled or disabled states based on quality-of-service (QoS) requirements and specification of power states. QoS can also be used by agents in embedded systems to automatically find appropriate dynamic power states [16]. Benini et al [3] provide a survey of design techniques for system-level dynamic power management.…”

Section: Related Workmentioning

confidence: 99%

Declarative Power Sequencing

Schult

Schwyn

Giardino

et al. 2021

ACM Trans. Embed. Comput. Syst.

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Modern computer server systems are increasingly managed at a low level by baseboard management controllers (BMCs). BMCs are processors with access to the most critical parts of the platform, below the level of OS or hypervisor, including control over power delivery to every system component. Buggy or poorly designed BMC software not only poses a security threat to a machine, it can permanently render the hardware inoperative. Despite this, there is little published work on how to rigorously engineer the power management functionality of BMCs so as to prevent this happening. This article takes a first step toward putting BMC software on a sound footing by specifying the hardware environment and the constraints necessary for safe and correct operation. This is best accomplished through automation: correct-by-construction power control sequences can be efficiently generated from a simple, trustworthy model of the platform’s power tree that incorporates the sequencing requirements and safe voltage ranges of all components. We present both a modeling language for complex power-delivery networks and a tool to automatically generate safe, efficient power sequences for complex modern platforms. This not only increases the trustworthiness of a hitherto opaque yet critical element of platform firmware: regulator and chip power models are significantly simpler to produce than hand-written power sequences. This, combined with model reuse for common components, reduces both time and cost associated with platform bring-up for new hardware. We evaluate our tool using a new high-performance 2-socket server platform with >100W per socket TDP, tight voltage limits and 25 distinct power regulators needing configuration, showing both fast (<10s) tool runtime, and correct power sequencing of a live system.

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