A Preprocessed PWM Scheme for Three-Limb Core Coupled Inductor Inverters

Abstract

A discontinuous PWM scheme is presented for a 6-switch 3-limb coupled inductor inverter. 3-level PWM phase output voltages are produced with a reduced switch count and reduced dv/dt stresses on loads and output filters. The PWM scheme described lowers the coupled inductor and semiconductor losses by lowering the inductor winding high-frequency current ripple using two techniques: winding excitation flipping (WEF) within each carrier cycle; the inductor magnetic flux is kept within the 3-limb core, neglecting natural leakage, by avoiding switching states that produce common-mode voltage excitation of the 3-limb inductor. To make best use of the non-standard switching patterns produced, reference signals are pre-processed before being delivered to the PWM modules using only one carrier signal: representing an approach well suited for implementation in a low-cost DSP. The digital output signals of each PWM module represent the desired switching states of each switch in the inverter. This approach contrast with previous published work, where post-processing of the PWM module output signals is necessary using digital logic circuitry such as an FPGA. Experimental results, with inductor loss and inverter efficiency comparisons for different operating conditions, confirm that the three-phase 6-switch inverter PWM patterns lower the highfrequency current ripple in the inductor windings, and hence, significantly lower the inverter losses and increase the power conversion efficiency.