A RC reconstruction filter for a 16-bit audio delta-sigma DAC

Abstract

To build a 16-bit audio delta-sigma (Δ-Σ) digital-to-analog converter (DAC), a low noise reconstruction filter has been presented in this paper. By using the direct charge transfer (DCT) technique, the low noise and small area is implemented. In addition, a fully differential operational amplifier (op-amp) with proposed switch capacitor (SC) common mode feed back (CMFB) circuit is employed for low-noise design in this system. The proposed reconstruction filter is designed in TSMC 0.35μm CMOS process. And a peak signal-to-noise density ratio (SNDR) of 95.3 dB and a dynamic range (DR) of 97.2 dB for a 5k Hz input signal is achieved at a 1.8V supply voltage.

A Stereo Audio Delta-Sigma DAC with 40-kHz Bandwidth and 103-dB SNR

“…The reconstruction filter is typically implemented as LPF. This can be implemented as off-chip [12,13] or on-chip [10,14]. If the continuous-time LPF is followed by the discrete-time SC internal DAC, the signal power is reduced by the periodic output reset of the internal DAC.…”

“…Also, the internal DAC with RZ-formatted output reduces the ISI. A trackand-hold (T/H) circuit with deglitch timing [13] also improves the signal power and the linearity.…”