2008 International Conference on Reconfigurable Computing and FPGAs 2008
DOI: 10.1109/reconfig.2008.63
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A Real-Time Embedded System for Stereo Vision Preprocessing Using an FPGA

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Cited by 12 publications
(6 citation statements)
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“…Focusing on FPGA implementations, many alternatives have been designed for overcoming the problems mentioned earlier about the input/output mapping function complexity. Several papers adopt a straightforward porting of the software Look-up-Table version [14], [15]. Given the high amount of memory needed in these approaches, external dynamic memories are required, leading to bulky and expensive hardware systems when such memory is not required for other purposes.…”
Section: Related Workmentioning
confidence: 99%
“…Focusing on FPGA implementations, many alternatives have been designed for overcoming the problems mentioned earlier about the input/output mapping function complexity. Several papers adopt a straightforward porting of the software Look-up-Table version [14], [15]. Given the high amount of memory needed in these approaches, external dynamic memories are required, leading to bulky and expensive hardware systems when such memory is not required for other purposes.…”
Section: Related Workmentioning
confidence: 99%
“…The loss compressed LUT method usually applies downsampling to reduce a size of LUT in the encoding process and interpolation to fill void pixels in the decoding process as in [9], [10]. Given that interpolation change calculated values based on relationship with adjacent values, a rectified image is distorted.…”
Section: A Loss Compressionmentioning
confidence: 99%
“…To overcome this issue, loss and lossless compression techniques are applied. One of the loss compression methods subsamples rectification mapping data and reconstructs using interpolation as in [9], [10]. Another recent research uses the run-length encoding technique with different order as in [11].…”
Section: Introductionmentioning
confidence: 99%
“…To resolve the problem, two approaches have been used: one is a simplified calculation of PPM [13] and the second is a hardware approach using a field-programmable gate array (FPGA) [14][15][16]. However, the first approach still requires an excessive computation time.…”
Section: Introductionmentioning
confidence: 99%