A Real-Time Software Platform for the Cell Processor

Maeda, Shunta; Asano, Shiro; Shimada, Tsuyoshi; Awazu, Koichi; Tago, H.

doi:10.1109/mm.2005.79

Cited by 15 publications

(9 citation statements)

References 4 publications

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“…We partially solve the issue via a scheduling algorithm for multiprocessors consisting of two unrelated processor types. This restricted model is of great practical interest, as it captures many current/future single-chip heterogeneous multiprocessors (AMD Inc 2010; Gschwind et al 2006;Maeda et al 2005;Freescale Semiconductor 2007). Our proposed algorithm, FF-3C, is low-degree polynomial in time-complexity, i.e., faster than algorithms based on ILP (or its relaxation to LP).…”

Section: Op Tmentioning

confidence: 99%

Assigning Real-Time Tasks on Heterogeneous Multiprocessors with Two Unrelated Types of Processors

Andersson

Raravi

Bletsas

2010

2010 31st IEEE Real-Time Systems Symposium

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Consider the problem of partitioned scheduling of an implicit-deadline sporadic task set on heterogeneous multiprocessors to meet all deadlines. Each processor is either of type-1 or type-2. We present a new algorithm, FF-3C, for this problem. FF-3C offers low time-complexity and provably good performance. Specifically, FF-3C offers (i) a time-complexity of O(n · max(m, log n) + m · log m), where n is the number of tasks and m is the number of processors and (ii) the guarantee that if a task set can be scheduled by an optimal partitioned-scheduling algorithm to meet all deadlines then FF-3C meets all deadlines as well if given processors at most 1−α times as fast (referred to as speed competitive ratio) and tasks are scheduled using EDF; where α is a property of the task set. The parameter α is in the range (0, 0.5] and for each task, it holds that its utilization is no greater than α or greater than 1 − α on each processor type. Thus, the speed competitive ratio of FF-3C can never exceed 2.We also present several extensions to FF-3C; these offer the same performance guarantee and time-complexity but with improved average-case performance. Via simulations, we compare the performance of our new algorithms and two state-ofthe-art algorithms (and variations of the latter). We evaluate algorithms based on (i) running time and (ii) the necessary multiplication factor, i.e., the amount of extra speed of processors that the algorithm needs, for a given task set, so as to succeed, compared to an optimal task assignment algorithm. Overall, we observed that our new algorithms perform significantly better than the state-of-the-art. We also observed that our algorithms perform much better in practice, i.e., the necessary multiplication factor of the algorithms is much smaller than their speed competitive ratio. Finally, we also present a clustered version of the new algorithm.

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Section: Op Tmentioning

confidence: 99%

Assigning Real-Time Tasks on Heterogeneous Multiprocessors with Two Unrelated Types of Processors

Andersson

Raravi

Bletsas

2010

2010 31st IEEE Real-Time Systems Symposium

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“…Maeda et al [13] have proposed a multi-layered programming model and a real time resource scheduler. Fatahalian et al [14] presented a programming language, Sequoia, to facilitate the management of memory hierarchy while developing program with multi-level parallelism.…”

Section: Gabor Basis Functionsmentioning

confidence: 99%

Design of an Automatic Target Recognition algorithm on the IBM Cell Broadband Engine

Che

Chatha

2010

ASAP 2010 - 21st IEEE International Conference on Application-Specific Systems, Architectures and Processors

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The paper presents the design of an Automatic Target Recognition (ATR) algorithm on the IBM Cell Broadband Engine (Cell BE). The implementation utilizes several optimizations that exploit both the specific algorithm constructs of the ATR and the architectural features of the Cell processor. We discuss a total of 8 optimizations and present performance improvements achieved by their application. The latency of the Cell BE implementation of the ATR algorithm is 0.070 seconds on the Sony PlayStation3 (PS3) platform. The achieved performance is more than 25 times faster than the fully optimized PowerPC implementation and almost 20 times faster than our best efforts on a Pentium4 CPU.

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“…Since MPSoC is a complex system, the software on the parallel programming and the Real Time Operating System (RTOS) are crucial either in running time of the embedded system or even in its development design stage [2] . Different from desktop multicore, embedded MPSoC is a resource limited system and is often application specific [3] .…”

Section: Introductionmentioning

confidence: 99%

An object oriented model scheduling for media-SoC

Cheng

Yao

Zhang

et al. 2009

J. Electron.(China)

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This paper proposes an object oriented model scheduling for parallel computing in media MultiProcessors System on Chip (MPSoC). Firstly, the Coarse Grain Data Flow Graph (CGDFG) parallel programming model is used in this approach. Secondly, this approach has the feature of unified abstraction for software objects implementing in processor and hardware objects implementing in ASICs, easy for mapping CGDFG programming on MPSoC. This approach cuts down the kernel overhead and reduces the code size effectively. The principle of the oriented object model, the method of scheduling, and how to map a parallel programming through CGDFG to the MPSoC are analyzed in this approach. This approach also compares the code size and execution cycles with conventional control flow scheduling, and presents respective management overhead for one application in media-SoC.

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A Real-Time Software Platform for the Cell Processor

Cited by 15 publications

References 4 publications

Assigning Real-Time Tasks on Heterogeneous Multiprocessors with Two Unrelated Types of Processors

Assigning Real-Time Tasks on Heterogeneous Multiprocessors with Two Unrelated Types of Processors

Design of an Automatic Target Recognition algorithm on the IBM Cell Broadband Engine

An object oriented model scheduling for media-SoC

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