A Real-Time Sound Field Rendering Processor

Abstract

Real-time sound field renderings are computationally intensive and memory-intensive. Traditional rendering systems based on computer simulations suffer from memory bandwidth and arithmetic units. The computation is time-consuming, and the sample rate of the output sound is low because of the long computation time at each time step. In this work, a processor with a hybrid architecture is proposed to speed up computation and improve the sample rate of the output sound, and an interface is developed for system scalability through simply cascading many chips to enlarge the simulated area. To render a three-minute Beethoven wave sound in a small shoe-box room with dimensions of 1.28 m × 1.28 m × 0.64 m, the field programming gate array (FPGA)-based prototype machine with the proposed architecture carries out the sound rendering at run-time while the software simulation with the OpenMP parallelization takes about 12.70 min on a personal computer (PC) with 32 GB random access memory (RAM) and an Intel i7-6800K six-core processor running at 3.4 GHz. The throughput in the software simulation is about 194 M grids/s while it is 51.2 G grids/s in the prototype machine even if the clock frequency of the prototype machine is much lower than that of the PC. The rendering processor with a processing element (PE) and interfaces consumes about 238,515 gates after fabricated by the 0.18 µm processing technology from the ROHM semiconductor Co., Ltd. (Kyoto Japan), and the power consumption is about 143.8 mW.

Encoding of Terms in EMB-Based Mealy FSMs

“…In turn, it results in decreasing for both the power consumption and propagation time (as compared to LUT-based counterparts). Because of it, there is a lot of EMB-based methods of Mealy FSMs synthesis [10,16].…”

“…If condition (8) is violated, then some methods of structural decomposition [16,17] could be used to diminish the values of L( f i ).…”

“…There are three main elements of FPGA which could be used to implement FSM circuits. They are: look-up table (LUT) elements, embedded memory blocks (EMB) and tools of programmable interconnections [14][15][16]. LUTs fit for implementing Boolean functions represented as sum-of-products (SOP) [8].…”

“…Due to the reconfigurability, it is possible to tune EMBs to meet the requirements of a particular design. There are the following pairs < S A , t F > [13]: < 15, 1 >, < 14, 2 >, < 13, 4 >, < 12, 8 >, < 11,16 >, < 10, 32 > and < 9, 64 >. It gives V 0 = 32 K, bits.…”

Special Issue on “Sound and Music Computing”

“…Yiyu et al [24] discuss an audio processor architecture, which is suitable for rendering a virtual acoustic environment using a finite-difference approach. Such a system can be useful for providing realistic acoustic experiences for gaming or virtual reality.…”