A Review on FPGA Implementation of Distributed Canny Edge Detector

Chandrashekar, N. S.; Nataraj, K. R.

doi:10.21647/icctest/2017/48996

Cited by 1 publication

(2 citation statements)

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“…But [2]The design improves the Canny-Deriche filter, with the set up of [1], processing is possible at 24 frames / second 33 MHz, off-chip SRAM memory used is composed of final (LIFO) stack. Canny-Deriche filter Demigny proposed a novel algorithm [3] which Reduce memory dimensions and doubles the computational economy. 2 FPGA implementations in [5] VHDL or Verilog and they use system directly soft hardware design level and hardware design tool.…”

Section: Literature Surveymentioning

confidence: 99%

“…Recently, GPGPU appeared as a strong and available parallel Computing basement for the applications on image processing. In authentic Canny method, calculation of low threshold bank on the overall stats of the picture which reduce execution time by a factor of [3][2]. Algorithm to Image Identification and Artix-7 FPGA Implementation for Adequate Edge Detection.…”

Section: Literature Surveymentioning

confidence: 99%

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Algorithm to Image Identification and Artix-7 FPGA Implementation for Adequate Edge Detection.

Vamsi K*,

Geethanjali,

Kumar

et al. 2020

IJRTE

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For any image identification based applications, edge detection is the primary step. The intention of the edge detection in image processing is to minimize the information that is not required in the analysis of identification of an image. In the process of reduction of insignificant data in the image, it may lead to some loss in information which in turn raise some problems like missing of boundaries with low contrast, false edge detection and some other noise affected problems. In order to reduce the effects due to noise, a modified version of popular edge detection algorithm “Canny edge detection algorithm” is proposed. Artix 7 FPGA board set up is used to implement, by using Xilinx platform the image that is obtained as output is displayed on monitor which is connected with FPGA board using connector port DVI. MATLAB Simulink is used for algorithm simulation and then it is executed on FPGA board using Xilinx platform. The results provide good motivation to use in different edge detection applications.

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Section: Literature Surveymentioning

confidence: 99%

Section: Literature Surveymentioning

confidence: 99%