A set of device generators for analogue and mixed-signal layout synthesis

Abstract

The layout synthesis of analog circuits remains today a complex task difficult to automate. Various strategies are used, from a completely full-custom design up to an automated synthesis taking into account analog constraints. One popular technique developed to help the analog layout synthesis is the use of procedural design of basic cells. These cells are afterwards assembled either manually or using other CAD tools. The device generators described in this paper are developed to enhance layout design productivity of analog cells. These generators are written in language Skill for the Opus-Cadence framework. They cover the most common devices: resistors, capacitors, inductors, various transistor shapes, differential pairs and current sources. The context and the objectives of this work, the development strategy and the main functionalities are presented. Finally, an example is given. These generators have been successfully used to design several circuits.