A side-channel and fault-attack resistant AES circuit working on duplicated complemented values

Doulcier-Verdier, Marion; Dutertre, Jean-Max; Fournier, Jacques; Rigaud, Jean-Baptiste; Robisson, Bruno; Tria, Assia

doi:10.1109/isscc.2011.5746316

Cited by 54 publications

(31 citation statements)

References 3 publications

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“…In here, we focus our discussion on AES, for which many countermeasures have been suggested. These countermeasures mainly can be divided into two classes: the ones based on detection [3,4]. Detection countermeasures aim to determine whether or not there is a fault occurred by comparing the results of the two operation through duplication or multiplex techniques for some computing, modules, or the whole algorithm [4].…”

Section: Introductionmentioning

confidence: 99%

“…Unfortunately, most existing countermeasures are very difficult to defense double fault attacks which can bypass the existing infection mechanisms [4,7]. This is because the most commonly used infection mechanisms are based on the assumption of the signal fault [4,5,7].…”

Section: Introductionmentioning

confidence: 99%

“…This is because the most commonly used infection mechanisms are based on the assumption of the signal fault [4,5,7]. What is worse, with the significantly improving accuracy of fault injections in recent years, it has become possible to carry on double fault attacks at a certain time [9,10].…”

Section: Introductionmentioning

confidence: 99%

“…To overcome the drawbacks in the above works, this paper presents a novel framework for infection mechanism called random infection mechanism to resist fault attacks based on the research of [4] and [6]. We use the encryption/decryption circuit to construct the fault diffusion pattern, so it could avoid under the possibility of double error attacks.…”

Section: Introductionmentioning

confidence: 99%

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Against fault attacks based on random infection mechanism

Zhang

et al. 2016

IEICE Electron. Express

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Fault attack is a very effective way to crack the key for cipher chip. Among existing fault attack countermeasures, the infection countermeasures are very effective means, but, most existing infection countermeasures are based on the single fault assumption, and the accuracy of fault injections has significantly improved in the late years, it has become possible to implementation of double fault attacks in specific circuit regions, and it is, therefore, flawed in the resistance to double fault attacks. Aim at the flawed mentioned, this paper proposes a countermeasure called random infection mechanism to resist fault attacks. We use the encryption/decryption circuit to construct the fault diffusion pattern and avoid under the possibility of double error attacks. Furthermore, in order to against single byte fault attacks, we introduce random numbers to make the fault diffusion randomization. Experiments are carried out to verify the proposed algorithm and the results show that the proposed random infection mechanism can resist fault attacks effectively including single byte error attacks.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Against fault attacks based on random infection mechanism

Zhang

et al. 2016

IEICE Electron. Express

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“…In these systems, cryptographic chips [1][2][3][4][5][6][7][8] are the foundation of their security. However, the emergence of side channel attacks (SCAs) has become a serious threat to cryptographic chips.…”

Section: Introductionmentioning

confidence: 99%

A side-channel analysis resistant reconfigurable cryptographic coprocessor supporting multiple block cipher algorithms

Shan¹,

Shi²,

Fu³

et al. 2014

2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

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A side-channel analysis resistant reconfigurable cryptographic coprocessor is designed and fabricated in 0.18μm CMOS with 1.8V supply and 100MHz frequency, supporting multiple block cipher algorithms of AES, DES, RC6 and IDEA. Our countermeasure utilizes idle processing elements existed in reconfigurable array to do dummy operations to hide leakage information. This method has little impact on area and frequency, and it is flexible after silicon. It resists SPA and DPA without distinguishing the encryption region. And by correlation-based electromagnetic analysis, measurement to disclosure of DES enhances 36 times with partial countermeasures and AES discloses no subkey after more than one million electromagnetic traces with full countermeasures.

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