A Signal-Integrity Aware ATPG Flow to Generate High-Quality Patterns for Testing System-on-Chip Designs

Asokan, Anu

doi:10.1109/vlsi-soc54400.2022.9939635

2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC) 2022

DOI: 10.1109/vlsi-soc54400.2022.9939635

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A Signal-Integrity Aware ATPG Flow to Generate High-Quality Patterns for Testing System-on-Chip Designs

Anu Asokan¹

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A Signal-Integrity Aware ATPG Flow to Generate High-Quality Patterns for Testing System-on-Chip Designs

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