A simple and accurate method for measuring program/erase speed in a memory capacitor structure

Abstract

With the merits of a simple process and a short fabrication period, the capacitor structure provides a convenient way to evaluate memory characteristics of charge trap memory devices. However, the slow minority carrier generation in a capacitor often makes an underestimation of the program/erase speed. In this paper, illumination around a memory capacitor is proposed to enhance the generation of minority carriers so that an accurate measurement of the program/erase speed can be achieved. From the dependence of the inversion capacitance on frequency, a time constant is extracted to quantitatively characterize the formation of the inversion layer. Experimental results show that under a high enough illumination, this time constant is greatly reduced and the measured minority carrier-related program/erase speed is in agreement with the reported value in a transistor structure.

Comparison between N 2 and O 2 anneals on the integrity of an Al 2 O 3 /Si 3 N 4 /SiO 2 /Si memory gate stack

“…Compared with the device with N 2 -PDA, the MANOS device with O 2 -PDA shows a low leakage current in a high voltage region, which is in agreement with the result from Rothchild et al [8] When gate voltage is positive (V g > 0), substrate minority carrier injection takes place. The MANOS device with O 2 -PDA has a lower saturation current in a range of V g higher than 10 V. It is due to the very slow minority carrier (electron) generation time in the MANOS device with O 2 -PDA, which has been proved by our previous measurement [11] and is further supported by a larger take-off time in a program speed curve of the O 2 -PDA device as shown in Fig. 2.…”

“…Without drain and source terminals, light illumination is used to assist the minority carrier generation during program speed measurement. [11] CV curves are measured at 1 MHz. The corresponding parameters such as the flatband voltage (V fb ) and surface potential are extracted using the popular CVC program developed by Hauser et al at North Carolina State University.…”

Preparation of Remote Plasma Atomic Layer-Deposited HfO2 Thin Films with High Charge Trapping Densities and Their Application in Nonvolatile Memory Devices

“…Consequently, the production and charging of minority carriers during programmable gate voltage application in an nchannel capacitor does not match the speed of the gate bias pulse. This can lead to inaccurate measurements of the P/E speed associated with the minority carriers [49]. To address this issue, we irradiated the device with light during the P/E speed measurement.…”