A single-chip 802.11a MAC/PHY with a 32-b RISC processor

Fujisawa, Toshio; Hasegawa, Jun; Tsuchie, K.; Shiozawa, T.; Fujita, Takeshi; Saito, Tomohiro; Unekawa, Yasuo

doi:10.1109/jssc.2003.818135

Cited by 66 publications

(13 citation statements)

References 1 publication

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“…During the period of the LTSP, the OFDM training symbols for channel estimation are transmitted [6,7]. Therefore, frequency offset needs to be estimated appropriately during the period of coarse estimation [8].…”

Section: Preamble Modelmentioning

confidence: 99%

Performance of frequency offset estimation in the presence of IQ imbalance for OFDM direct conversion receivers

Inamori

Bostamam

Sanada

2009

2009 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing

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In WLAN receivers, a direct conversion architecture has been implemented in recent years. Though this architecture reduces cost and power consumption, it may suffer from direct current (DC) offset and frequency offset. To reduce the effect of DC offset, a frequency offset estimation scheme with a differential filter for orthogonal frequency division multiplexing (OFDM) direct conversion receivers has been proposed. However, the receiver may also suffer from IQ imbalance, which deteriorates the performance of frequency offset estimation. In this paper, the performance analysis of the frequency offset estimation scheme with the differential filter in the presence of IQ imbalance is derived. The numerical results obtained through computer simulations show that the derived analysis provides close approximation to the performance of the frequency offset estimation scheme. It also clarifies the dependency of the mean square error on the waveform of the preamble symbols, which is caused by IQ imbalance.

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Section: Preamble Modelmentioning

confidence: 99%

Performance of frequency offset estimation in the presence of IQ imbalance for OFDM direct conversion receivers

Inamori

Bostamam

Sanada

2009

2009 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing

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“…MAC protocol accelerators for wireless communication systems have been reported, e.g. by Meng et al [9] and Fujisawa et al [2], for the IEEE 802.11a standard, and by Haroud et al [5] also for the IEEE 802.15.3 standard. In the latter publication, little is said about the mechanism to initiate frame transmission and the interface between hardware and software.…”

Section: Related Workmentioning

confidence: 99%

“…The use of hardware queues for autonomous transmission of packets is well-known practice and has also been described in [9] and [2]. However, hardware transmission queues are not limited to the design of wireless communication systems, but are used also in high-performance network switching devices such as ATM routers.…”

Section: Related Workmentioning

confidence: 99%

A hardware accelerated implementation of the IEEE 802.15.3 MAC protocol

Dietterle

Kraemer

2009

Telecommun Syst

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We present a hardware/software implementation of the IEEE 802.15.3 MAC protocol. Processing-intensive and time-critical protocol tasks are handled by a protocol accelerator that is integrated on-chip with a 32-bit generalpurpose processor in order to achieve a moderate (20-40 MHz) system clock frequency. This enables low-power wireless devices compliant with this standard, providing high data rate, multimedia communication.One of the main tasks of the protocol accelerator is to analyze received or transmitted beacons. Based on the channel time allocations broadcast in the beacon and frame information stored in a hardware transmission queue, frames are transmitted without immediate control of the processor. Other features of the protocol accelerator include CRC generation, handling of immediate acknowledgment frames, and direct memory access.

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“…The SNR measurements can take place during the preamble period at the beginning of the received packet. So, a single antenna connection is maintained most times, but during the measurement of the SNR, all the antennas connections need to be established [12]. • Full diversity.…”

Section: Diversity Mechanisms In 80211 Cardsmentioning

confidence: 99%

Revealing transmit diversity mechanisms and their side-effects in commercial IEEE 802.11 cards

Giustiniano

Tinnirello

Scalia

et al. 2008

2008 4th International Telecommunication Networking Workshop on QoS in Multiservice IP Networks

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Service differentiation in WLAN has been traditionally faced at the MAC layer. However, some PHY layer parameters, such as the transmission power, the antenna, and the modulation/coding scheme, have a deep impact on network performance. Since the criterion for selecting these parameters is left to the vendor specific implementations, the performance spread of most experimental results about 802.11 WLAN could be affected by vendor proprietary schemes. The focus of this paper is an experimental analysis of the undisclosed antenna diversity mechanisms employed by some widely used cards (namely, the Atheros and Intel based cards), and a thorough understanding of the optimization goals which guided their design. Although these mechanisms have been introduced for improving the transmission robustness to fading, we proved that they may have dramatic sideeffects on link performance, whenever the available antennas are not homogeneous 1 .

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A single-chip 802.11a MAC/PHY with a 32-b RISC processor

Cited by 66 publications

References 1 publication

Performance of frequency offset estimation in the presence of IQ imbalance for OFDM direct conversion receivers

Performance of frequency offset estimation in the presence of IQ imbalance for OFDM direct conversion receivers

A hardware accelerated implementation of the IEEE 802.15.3 MAC protocol

Revealing transmit diversity mechanisms and their side-effects in commercial IEEE 802.11 cards

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