A study of analog decision feedback equalization for ADC-Based serial link receivers

Mahmoudi, Azad; Torkzadeh, Pooya; Dousti, Massoud

doi:10.1016/j.vlsi.2018.09.003

Cited by 2 publications

(1 citation statement)

References 32 publications

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“…SAR ADC are researched and described for different applications such as Biomedical applications, wireless sensors, receivers, etc. [35,36,37,39,40,42] for its high speed performance. Another type of ADC: Flash ADC [38,41,43] is also proposed for many applications such as high-speed instrumentation, radar, wireless sensor network, DSO, digital TVs and so on.…”

Section: Fig 6: Zoomed In View Of Adc Core [21]mentioning

confidence: 99%

Analog to Digital Converters (ADC): A Literature Review

Dalmia

Sinha

2020

E3S Web Conf.

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The signal processing is advancing day by day as its needs and in wireline/wireless communication technology from 2G to 4G cellular communication technology with CMOS scaling process. In this context the high-performance ADCs, analog to digital converters have snatched the attention in the field of digital signal processing. The primary emphasis is on low power approaches to circuits, algorithms and architectures that apply to wireless systems. Different techniques are used for reducing power consumption by using low power supply, reduced threshold voltage, scaling of transistors, etc. In this paper, we have discussed the different types and different techniques used for analog to digital conversion of signals considering several parameters.

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Section: Fig 6: Zoomed In View Of Adc Core [21]mentioning

confidence: 99%

Analog to Digital Converters (ADC): A Literature Review

Dalmia

Sinha

2020

E3S Web Conf.

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Low Power and Area Optimized Architectures for BPSK Modulator

Usha¹,

Dept²,

Mahesh³

2018

IJITCS

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Low power modulators are most efficient for wireless communication. The conventional BPSK modulator consumes more power and area. In this work, the new approaches for BPSK modulator are discussed and recorded. The four new approaches consume less area and power than the conventional design of BPSK Modulator. The power and area consumed by new approaches are compared with the conventional method. Cadence software is used for the simulation and synthesis, the power and area reduction in 180nm, 90nm and 45nm CMOS Technology is reported, MATLAB/SIMULINK is used to do BER analysis of BPSK modulator with AWGN channel. The new architectures enhance the performance of BPSK Modulator in consuming less power and utilizing less area than the conventional design.

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A study of analog decision feedback equalization for ADC-Based serial link receivers

Cited by 2 publications

References 32 publications

Analog to Digital Converters (ADC): A Literature Review

Analog to Digital Converters (ADC): A Literature Review

Low Power and Area Optimized Architectures for BPSK Modulator

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