A Sub 1V 96 ¿W Fully Operational Digital Hearing Aid Chip With Internal Status Controller

Abstract

Abstract-A Low power fully operational digital hearing aid chip is proposed and implemented. The Σ-∆ ADC adopts the status controller to realize adaptive SNR technique without any external control. To achieve both low power consumption and high programmability, dedicated low power DSP with 6 control parameters is designed. The heterogeneous Σ-∆ DAC reduces more power dissipation without performance degradation. The digital hearing aid system is fabricated in 0.18 µm CMOS technology, consumes less than 96 µW and has a die size of 2.8 mm x 1.1 mm.