A symmetric quantum-dot cellular automata design for 5-input majority gate

Roohi, Arman; Khademolhosseini, Hossein; Sayedsalehi, Samira; Navi, Keivan

doi:10.1007/s10825-014-0589-5

Cited by 93 publications

(56 citation statements)

References 22 publications

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“…3(c) presented in [12] and Fig. 3(d) presented in [13]) tried to overcome these drawbacks by proposing a novel device. Most of the presented designs are applied as a basic component in one-bit full-adder architecture.…”

Section: Review On the Previous Five-input Majority Gatesmentioning

confidence: 99%

“…Most of the presented designs are applied as a basic component in one-bit full-adder architecture. According to [11], a logical relation could be derived between a five-input majority gate, weight of input cells and their impacts on [11], (c) design in [12] and (d) design in [13]. the voter cell.…”

Section: Review On the Previous Five-input Majority Gatesmentioning

confidence: 99%

“…In the case of equally spaced neighboring cells, factor f i,j is absorbed into the Kink energy definition (E k ). This energy is associated with the energy cost of two QCA cells (i and j) having opposite polarizations and can be computed as [13] …”

Section: Qca Power Dissipation Modelmentioning

confidence: 99%

“…The power dissipation maps for five-input majority gates at 2 K temperature with 0.5 E k (a) design in [10], (b) design in [11], (c) design in [12], (d) design in [13] and (e) PM5. Design in [10] Design in [11] Design in [12] Design in [13] Fault tolerant design in [27] Fault tolerant design in [28] PM5 T u n n e l i n g Design in [10] Design in [11] Design in [12] Design in [13] Fault tolerant design in [27] Fault tolerant design in [28] PM5 Avg. switching energy dissipation (mev)…”

Section: Pm5mentioning

confidence: 99%

“…One of the most accurate power dissipation models has been proposed by Timler and Lent [4] and an upper bound power dissipation for QCA circuits is estimated by Srivastava et al [6] based on it. Furthermore, in recent years, lots of investigations have been launched in order to design various digital circuits based on this technology; new designs for five-input majority gate [10][11][12][13]27,28], structures for one-bit full-adder cell [10,11,21,22], designs for flip-flops and memory cells [14,15,23], QCA complex gate designs [29,32] and also studies on reversible circuits [24,25] have been presented.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Designing efficient QCA logical circuits with power dissipation analysis

Sheikhfaal

Angizi

Sarmadi

et al. 2015

Microelectronics Journal

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Section: Review On the Previous Five-input Majority Gatesmentioning

confidence: 99%

Section: Review On the Previous Five-input Majority Gatesmentioning

confidence: 99%

Section: Qca Power Dissipation Modelmentioning

confidence: 99%

Section: Pm5mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Designing efficient QCA logical circuits with power dissipation analysis

Sheikhfaal

Angizi

Sarmadi

et al. 2015

Microelectronics Journal

Self Cite

165

View full text Add to dashboard Cite

Designing a multi‐layer full‐adder using a new three‐input majority gate based on quantum computing

Seyedi

Navimipour

2021

Concurrency and Computation

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Recently, quantum dot-cellular automata (QCA) has fascinated much attention because of its potential less area consumption, low power usage, less intricacy, and low delay. The full-adder circuit is used in this technology for several procedures, like multiplication, subtraction, and division in the arithmetic logic unit. For this reason, the full-adder is generally investigated as a central unit in the development of QCA technology. The present investigation demonstrates a new efficient QCA-based full-adder layout utilizing the TIEO gate and new 3-input majority gate. In this design, the inputs get inside one side, and the outputs are derived from another circuit side. Other cells do not embrace the output and input signals, and they may simply be available, helping produce a more impressive circuit layout. Concretely speaking, in this design, the 0.02 μm 2 region and the latency of the 0.5 clock cycle have been implemented using only 18 cells. Utilizing the QCADesigner tool, the suggested design in the current investigation has been functionally approved. The simulation outcomes show that this layout conducts properly and works faster than the oldest designs.

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A new applicable and multilayer design of nanoscale adder–subtractor using quantum‐dots

Gao

Mohammed

2022

Concurrency and Computation

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Quantum-dot cellular automata (QCA) is a technique that can substitute silicon transistors. Besides, the computational architecture and systems are focused on nanoscale QCA in response to industry demands for energy-efficient and high-performance computing systems. Because of the importance of adder/subtractor designs in logical circuits, a novel QCA-based adder/subtractor design is suggested in this study. A full adder is developed first, followed by a full subtractor. These QCA-based adder/subtractor designs are simple, ultra-efficient, constructive, and have easy input and output access.To create the required output, these circuits make use of quantum technology's intrinsic features. The QCADesigner program is used to assess the simulation findings of the recommended designs. Additionally, these designs are investigated in terms of complexity, clocking, cells, and latency. It shows that the recommended design is more efficient than standard designs regarding the area, cell count, and cost. These circuits are among the circuits in which easy access to inputs and outputs is provided, and their connection to other circuits makes them more practical. In addition to the above, the low number of cells, high speed, and easy implementation are among the innovations of the presented circuits. K E Y W O R D Sfull-adder, QCA, QCADesigner, quantum-dot cellular automata, subtractor INTRODUCTIONCMOS circuits may be made in a small amount of time, leading designers to look into it as a business strategy. 1 Documentation of leakage current and high-power usage in CMOS devices has surfaced in past years. As a result, the CMOS technological revolution must occur. Moore's law is followed by CMOS technology, which is based on today's conventional transistors. 2 Enhancing the transistors in a chip in CMOS technology is undesirable. However, since micro and nano-structures have gotten much attention recently, 3 a strategy at the nanoscale can demonstrate the ability to change Moore's law. That strategy is quantum-dot cellular automata (QCA) technology, which broke Moore's law by rapidly substituting innovative technology with CMOS. [4][5][6] In the QCA technology, several studies are conducted on the layout of different digital circuits like basic logic gates, 7 adders, 8,9 encoders, 10 subtractors, 11-13 multiplexers, 14-17 dividers, 18,19 and memory circuits. 20,21 Meanwhile, adders and subtractors hold a unique place in digital systems because they significantly influence their performance. 22,23 It is worth noting that developers strive to research a wide range of challenges, including complexity and limited occupancy space. However, owing to the novelty of this technology, there are still several significant hurdles that have yet to be overcome. 24

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A symmetric quantum-dot cellular automata design for 5-input majority gate

Cited by 93 publications

References 22 publications

Designing efficient QCA logical circuits with power dissipation analysis

Designing efficient QCA logical circuits with power dissipation analysis

Designing a multi‐layer full‐adder using a new three‐input majority gate based on quantum computing

A new applicable and multilayer design of nanoscale adder–subtractor using quantum‐dots

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