A Thin-Film Transistor With High Drain Current Induced by a Trap-Assisted Electric Double Layer

Gangwar, Ankita; Mazhari, B.

doi:10.1109/ted.2016.2614673

Cited by 1 publication

(1 citation statement)

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“…Nevertheless, recent work proposed charge trapping from the gate electrode as an approach to increase the gate capacitance leading to an increased drain current I D [30]. Similarly, charge exchange between the gate electrode and a floating gate metal embedded into the gate stack has been lately investigated for a reduction of the operating voltage [31].…”

Section: Introductionmentioning

confidence: 99%

Charge Trapping Mechanism Leading to Sub-60-mV/decade-Swing FETs

Daus

Vogt

Münzenrieder

et al. 2017

IEEE Trans. Electron Devices

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(2017) Charge trapping mechanism leading to sub-60-mV/decade-Swing FETs. IEEE Transactions on Electron Devices, 64 (7). pp. 2789 -2796 This version is available from Sussex Research Online: http://sro.sussex.ac.uk/68771/ This document is made available in accordance with publisher policies and may differ from the published version or from the version of record. If you wish to cite this item you are advised to consult the publisher's version. Please see the URL above for details on accessing the published version. Copyright and reuse:Sussex Research Online is a digital repository of the research output of the University.Copyright and all moral rights to the version of the paper presented here belong to the individual author(s) and/or other copyright owners. To the extent reasonable and practicable, the material made available in SRO has been checked for eligibility before being made available.Copies of full text items generally can be reproduced, displayed or performed and given to third parties in any format or medium for personal research or study, educational, or not-for-profit purposes without prior permission or charge, provided that the authors, title and full bibliographic details are credited, a hyperlink and/or URL is given for the original metadata page and the content is not changed in any way. Abstract-In this work, we present a novel method to reduce the subthreshold swing of field-effect transistors below 60 mV/dec. Through modeling, we directly relate trap charge movement between the gate electrode and the gate dielectric to subthreshold swing reduction. We experimentally investigate the impact of charge exchange between a Cu gate electrode and a 5 nm thick amorphous Al2O3 gate dielectric in an InGaZnO4 thin-film transistor. Positive trap charges are generated inside the gate dielectric while the semiconductor is in accumulation. During the subsequent de-trapping, the subthreshold swing diminishes to a minimum value of 46 mV/dec at room temperature. Furthermore, we relate the charge trapping/de-trapping effects to a negative capacitance behavior of the Cu/Al2O3 metal-insulator structure. IEEE TRANSACTIONS ON ELECTRON DEVICES

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Section: Introductionmentioning

confidence: 99%