Accelerated and Reliable Analog Circuits Yield Analysis Using SMT Solving Techniques

Lahiouel, Ons; Zaki, Mohamed H.; Tahar, Sofiène

doi:10.1109/tcad.2017.2651807

Cited by 3 publications

(1 citation statement)

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“…Both of these methods are available in the most current versions of commercial circuit simulators such as Synopsys Hspice R and Cadence Spectre R . The work in [63] proposes an accelerated and reliable computation of yield that combines the advantages of sparse regression and satisfiability modulo theory (SMT) solving techniques.…”

Section: Statistical Analysis For Yield Determinationmentioning

confidence: 99%

A Comprehensive Review on Automation-based Sizing Techniques for Analog IC Design

Girardi

De-Oliveira

Ghissoni

et al. 2022

JICS

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Analog integrated circuits are present in most electronic systems. They must be designed carefully in order to achieve the required performance specifications. Although almost half of the design effort in a chip is spent in analog modules, there are not yet a consolidated industry of analog design automation tools capable to fully synthesize analog circuits in a fast and generic way. This is due the fact that automatic or semi-automatic design tools have to deal with high design complexity, which includes several specifications and design variables. A lot of research effort have been done in this field in the past years, proposing methods for automating parts of the design flow, from topology selection to devices sizing and layout generation. This paper presents a review of the state-of-the art in analog design automation methods, focusing on techniques and algorithms used to size robust circuits while efficiently exploring the design space.

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Section: Statistical Analysis For Yield Determinationmentioning

confidence: 99%