Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes

Tang, Wai Teng; Tan, Wen Jun; Ray, Rajarshi; Wong, Yi Wen; Chen, Weiguang; Kuo, Shyh-hao; Goh, Rick Siow Mong; Turner, Stephen J.; Wong, Weng-Fai

doi:10.1145/2503210.2503234

Cited by 45 publications

(17 citation statements)

References 24 publications

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“…Since then, GPU‐accelerated SpMVs have attracted considerable attention. Many new efficient SpMV kernels are proposed for GPUs using the variants of the CSR, ELL, and COO storage formats . On the multi‐GPU platform, researchers also develop many efficient SpMV algorithms .…”

Section: Related Workmentioning

confidence: 99%

“…Many new efficient SpMV kernels are proposed for GPUs using the variants of the CSR, ELL, and COO storage formats. [7][8][9][10][11][12][13][14][15] On the multi-GPU platform, researchers also develop many efficient SpMV algorithms. 9,20,21 However, they only use a single storage format for all GPUs in these algorithms.…”

Section: Related Workmentioning

confidence: 99%

“…In 1 study, based on CUDA, Bell and Garland present some efficient SpMV kernels for well‐known sparse matrix storage formats such as CSR, DIA, ELL (ELLPACK/ITPACK), COO, and HYB. Thus, many new efficient SpMV kernels are also proposed for GPUs using the variants of the CSR, ELL, and COO storage formats such as the compressed sparse eXtended, bit‐representation–optimized compression, block CSR, ELLPACK‐R, sliced ELL, SELL‐C‐ σ , sliced COO, and blocked compressed COO . From experimental results in these literature, we observe that there is no single format that is best for all the matrices.…”

Section: Introductionmentioning

confidence: 99%

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A novel multi–graphics processing unit parallel optimization framework for the sparse matrix‐vector multiplication

Gao

Wang

2016

Concurrency and Computation

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Summary The sparse matrix‐vector multiplication (SpMV) is of great importance in scientific computations. Graphics processing unit (GPU)‐accelerated SpMVs for large‐sized problems have attracted considerable attention recently. We observe that on a specific multi‐GPU platform, the SpMV performance can usually be greatly improved when a matrix is partitioned into several blocks according to a predetermined rule and each block is assigned to a GPU with an appropriate storage format. This motivates us to propose a novel multi‐GPU parallel SpMV optimization framework, which involves the following parts: (1) a simple rule is defined to divide any given matrix among multiple GPUs; (2) a performance model, which is independent of the problems and dependent on the resources of devices, is proposed to accurately predict the execution time of SpMV kernels; and (3) a selection algorithm is suggested to automatically select the most appropriate one from the storage formats that are involved in the framework for the matrix block that is assigned to each GPU on the basis of the performance model. The objective of our framework does not construct a new storage format or algorithm but automatically and rapidly generates an optimally parallel SpMV for any sparse matrix on a specific multi‐GPU platform by integrating the existing storage formats and their corresponding kernels. We take 5 popular storage formats, for example, to present the idea of constructing the framework. Theoretically, we validate the correctness of our proposed SpMV performance model. This model is constructed only once for each type of GPU. Moreover, this framework is general and easy to be extensible. For a storage format that is not included in our framework, once the performance model of its corresponding SpMV kernel is successfully constructed, it can be incorporated into our framework. The experiments validate the efficiency of our proposed framework.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A novel multi–graphics processing unit parallel optimization framework for the sparse matrix‐vector multiplication

Gao

Wang

2016

Concurrency and Computation

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“…BRO-COO reduces information redundancy in the row index array. Details of the BRO-ELL and BRO-COO storage formats can be found in [17].…”

Section: Bro-ell and Bro-coo Formatsmentioning

confidence: 99%

A Family of Bit-Representation-Optimized Formats for Fast Sparse Matrix-Vector Multiplication on the GPU

Tang

Tan

Goh

et al. 2015

IEEE Trans. Parallel Distrib. Syst.

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Sparse matrix-vector multiplication (SpMV) is an important kernel that is used in many iterative algorithms for solving scientific and engineering problems. One of the main challenges of SpMV is its memory-boundedness due to the low arithmetic intensity of the kernel. Although compression has been proposed previously to improve SpMV performance on CPUs, its use has not been demonstrated on the GPU because of the serial nature of many compression and decompression schemes. In this paper, we introduce a family of bit-representation-optimized (BRO) compression formats for representing sparse matrices on GPUs. The proposed formats -BRO-CSR, BRO-ELL and BRO-HYB, perform compression on index data and help to speed up SpMV on GPUs through the reduction of memory traffic. We also propose two other hybrid BRO formats which can potentially perform better than both HYB and BRO-HYB formats. Experimental results demonstrate that compared to uncompressed CSR and ELLPACK formats, our proposed compressed BRO-CSR and BRO-ELL formats are able to achieve average speedups of 2Â and 1.4Â respectively. Furthermore, we demonstrate that by using BRO-ELL, the preconditioned conjugate gradient method is able to achieve an average speedup of 1.3Â over ELLPACK.

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“…The problem with the reordering technique is that it changes the inherent locality of the original matrix. A recent work by Tang et al [20] studies bit-representations to compress index arrays. Similar to our work, a difference function is applied to index arrays.…”

Section: Related Workmentioning

confidence: 99%

yaSpMV

Yan

Zhang

et al. 2014

Proceedings of the 19th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming

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SpMV is a key linear algebra algorithm and has been widely used in many important application domains. As a result, numerous attempts have been made to optimize SpMV on GPUs to leverage their massive computational throughput. Although the previous work has shown impressive progress, load imbalance and high memory bandwidth remain the critical performance bottlenecks for SpMV. In this paper, we present our novel solutions to these problems. First, we devise a new SpMV format, called blocked compressed common coordinate (BCCOO), which uses bit flags to store the row indices in a blocked common coordinate (COO) format so as to alleviate the bandwidth problem. We further improve this format by partitioning the matrix into vertical slices to enhance the cache hit rates when accessing the vector to be multiplied. Second, we revisit the segmented scan approach for SpMV to address the load imbalance problem. We propose a highly efficient matrix-based segmented sum/scan for SpMV and further improve it by eliminating global synchronization. Then, we introduce an auto-tuning framework to choose optimization parameters based on the characteristics of input sparse matrices and target hardware platforms. Our experimental results on GTX680 GPUs and GTX480 GPUs show that our proposed framework achieves significant performance improvement over the vendor tuned CUSPARSE V5.0 (up to 229% and 65% on average on GTX680 GPUs, up to 150% and 42% on average on GTX480 GPUs) and some most recently proposed schemes (e.g., up to 195% and 70% on average over clSpMV on GTX680 GPUs, up to 162% and 40% on average over clSpMV on GTX480 GPUs).

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Accelerating sparse matrix-vector multiplication on GPUs using bit-representation-optimized schemes

Cited by 45 publications

References 24 publications

A novel multi–graphics processing unit parallel optimization framework for the sparse matrix‐vector multiplication

A novel multi–graphics processing unit parallel optimization framework for the sparse matrix‐vector multiplication

A Family of Bit-Representation-Optimized Formats for Fast Sparse Matrix-Vector Multiplication on the GPU

yaSpMV

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