Advancing Electrical Impedance Spectroscopy (EIS): Low-power, High-accuracy, Wide-dynamic-range, and High-throughput Impedance Measurement Circuits and Architectures

Abstract

This chapter offers an extensive introduction to readout circuit architectures designed to measure impedances across a frequency range in electrical impedance spectroscopy (EIS). The impedance readout circuit, an essential component of on-chip EIS systems, significantly affects key system performances, including precision and speed of measurements, noise, and power consumption. With an increasing demand for implantable, wearable, and portable EIS systems, researchers have been focusing on achieving higher energy efficiency while maintaining high precision and speed in measurements. Additionally, to improve the compactness and ease of use of EIS systems, various systems use two-electrode and dry-electrode setups rather than the conventional four- and wet-electrode configurations. Numerous innovative methods have been developed to provide reliable measurements using two- and dry-electrode interfaces. This chapter discusses advances in impedance-readout architectures and their pros and cons. These approaches are designed to achieve low power consumption, broad frequency and input ranges, high accuracy with low noise, rapid measurement times, and/or high input impedance. The in-depth analyses of each of these improvements for EIS systems will provide insights into the future progress of small-form-factor EIS systems for biomedical and Internet of Things (IoT) applications.