Algorithm and Architecture of Disparity Estimation With Mini-Census Adaptive Support Weight

Chang, Ning; Tsai, Tsung-Yen; Hsu, B.J.; Chen, Yi‐Chun; Chang, Tian-Sheuan

doi:10.1109/tcsvt.2010.2045814

Cited by 113 publications

(83 citation statements)

References 30 publications

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“…Various hardware architectures that are presented in literature provide real-time DE [15][16][17][18][19][20][21]. Some implemented hardware architectures only target CIF or VGA video [15][16][17][18].…”

Section: Introductionmentioning

confidence: 99%

“…Some implemented hardware architectures only target CIF or VGA video [15][16][17][18]. The hardware proposed in [15] only claims real-time for CIF video.…”

Section: Introductionmentioning

confidence: 99%

“…Some implemented hardware architectures only target CIF or VGA video [15][16][17][18]. The hardware proposed in [15] only claims real-time for CIF video. It uses the Census transform [22] and currently provides the highest quality disparity results compared to real-time hardware implementations in ASICs and FPGAs.…”

Section: Introductionmentioning

confidence: 99%

“…It uses the Census transform [22] and currently provides the highest quality disparity results compared to real-time hardware implementations in ASICs and FPGAs. The hardware presented in [15] uses low complexity Mini-Census method to determine the matching cost, and aggregates the Hamming costs following the method in [12]. Due to high complexity cost aggregation, the hardware proposed in [15] requires high memory bandwidth and intense hardware Contents lists available at ScienceDirect journal homepage: www.elsevier.com/locate/vlsi resource utilization, even for low resolution (LR) video.…”

Section: Introductionmentioning

confidence: 99%

“…The hardware presented in [15] uses low complexity Mini-Census method to determine the matching cost, and aggregates the Hamming costs following the method in [12]. Due to high complexity cost aggregation, the hardware proposed in [15] requires high memory bandwidth and intense hardware Contents lists available at ScienceDirect journal homepage: www.elsevier.com/locate/vlsi resource utilization, even for low resolution (LR) video. Therefore, it is able to reach less than 3 frames per second (fps) when its performance is scaled to 1024 Â 768 video resolution and 128 pixel disparity range.…”

Section: Introductionmentioning

confidence: 99%

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Dynamically adaptive real-time disparity estimation hardware using iterative refinement

et al. 2014

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a b s t r a c tThe computational complexity of disparity estimation algorithms and the need of large size and bandwidth for the external and internal memory make the real-time processing of disparity estimation challenging, especially for High Resolution (HR) images. This paper proposes a hardware-oriented adaptive window size disparity estimation (AWDE) algorithm and its real-time reconfigurable hardware implementation that targets HR video with high quality disparity results. Moreover, an enhanced version of the AWDE implementation that uses iterative refinement (AWDE-IR) is presented. The AWDE and AWDE-IR algorithms dynamically adapt the window size considering the local texture of the image to increase the disparity estimation quality. The proposed reconfigurable hardware architectures of the AWDE and AWDE-IR algorithms enable handling 60 frames per second on a Virtex-5 FPGA at a 1024 Â 768 XGA video resolution for a 128 pixel disparity range.

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Section: Introductionmentioning

confidence: 99%

“…Some implemented hardware architectures only target CIF or VGA video [15][16][17][18]. The hardware proposed in [15] only claims real-time for CIF video.…”

Section: Introductionmentioning

confidence: 99%