An efficient bottom-up extraction approach to build the behavioral model of switched-capacitor ΔΣ modulator

Abstract

In this paper, an efficient bottom-up extraction approach is proposed to build accurate behavioral model for the switched-capacitor (SC) delta-sigma ( ) modulator. In the special extraction mode, we can use several specific patterns to obtain the key circuit parameters of the design in a short time without separating it into several sub-blocks. Actual loading effects and parasites can be considered automatically, which makes our modeling approach become more suitable for existed IPs and flattened postlayout designs. In the experiments, the comparison results between our behavioral model and HSPICE simulation have demonstrated the accuracy and efficiency of the proposed modeling strategy.