An Energy-Efficient Micropower Neural Recording Amplifier

Abstract

This paper describes an ultralow-power neural recording amplifier. The amplifier appears to be the lowest power and most energy-efficient neural recording amplifier reported to date. We describe low-noise design techniques that help the neural amplifier achieve input-referred noise that is near the theoretical limit of any amplifier using a differential pair as an input stage. Since neural amplifiers must include differential input pairs in practice to allow robust rejection of common-mode and power supply noise, our design appears to be near the optimum allowed by theory. The bandwidth of the amplifier can be adjusted for recording either neural spikes or local field potentials (LFPs). When configured for recording neural spikes, the amplifier yielded a midband gain of 40.8 dB and a -3-dB bandwidth from 45 Hz to 5.32 kHz; the amplifier's input-referred noise was measured to be 3.06 muVrms while consuming 7.56 muW of power from a 2.8-V supply corresponding to a noise efficiency factor (NEF) of 2.67 with the theoretical limit being 2.02. When configured for recording LFPs, the amplifier achieved a midband gain of 40.9 dB and a -3-dB bandwidth from 392 mHz to 295 Hz; the input-referred noise was 1.66 muVrms while consuming 2.08 muW from a 2.8-V supply corresponding to an NEF of 3.21. The amplifier was fabricated in AMI's 0.5-mum CMOS process and occupies 0.16 mm(2) of chip area. We obtained successful recordings of action potentials from the robust nucleus of the arcopallium (RA) of an anesthesized zebra finch brain with the amplifier. Our experimental measurements of the amplifier's performance including its noise were in good accord with theory and circuit simulations.

Design and Analysis of a Hardware-Efficient Compressed Sensing Architecture for Data Compression in Wireless Sensors

“…A figure of merit that captures the relationship between and power consumption in the amplifier is the noise efficiency factor (NEF) which was first introduced in [24] and captures the effective number of transistors contributing noise: (12) where is the total amplifier current, is the thermal voltage and is the bandwidth of the amplifier. Measured NEFs in state of the art low-noise amplifiers fall in between 2 and 3 [25]- [27]. For future analysis, a NEF of 3 will be used 8 and the required power for the array of amplifiers can then be calculated by rewriting (12) as (13) 7 The noise term due to the sampling switch of the S/H circuit has been omitted since it will be insignificant for any practical values of and .…”

“…The required value of varies by application and the expected dynamic range of the input signal, but a common specification used in previously published bio-sensor applications is 40 dB [3], [25], [27]. This constraint, however, assumes that the total gain is set such that the input range of the ADC is perfectly accommodated.…”

Transmission of wireless neural signals through a 0.18µm CMOS low-power amplifier

“…Many neural signal amplifiers have been developed since 2000 [8][9][10][11], but none of them meets our proposed needs. In former works, some authors implemented simple Operational Transconductance Amplifiers (OTA's) for neural signal amplification based on older technologies (1500 nm to 500 nm).…”

A Low Noise Low Power OTA with Adjustable Gain PID Feedback Network for EEG SoC Arrays"

“…Other works [2] present better noise efficiency factor (NEF) but at the expense of more complex source-degenerated current mirrors architecture, which makes them more susceptible to process variations.…”