An FD/FDD transceiver with RX band thermal, quantization, and phase noise rejection and >64dB TX signal cancellation

Tunable Frequency-Division Duplex RF Front End Using Electrical Balance and Active Cancellation

“…This work also implements a +27 dBm transmitter chain, and characterises the desensitisation in the presence of a full-power LTE uplink Tx blocker. This goes beyond previous works, which either did not characterise desensitisation noise [16]- [18], [20], [22], or did not achieve +27 dBm Tx power [11]- [13]. The architecture was previously presented in [7]; this paper extends [7], providing further qualitative and quantitative system level analysis of the architecture, presenting additional measurement results at different operating frequencies, duplex separations, bandwidths, and power levels, and analyzing desensitization noise coupling mechanisms in the system.…”

“…Consequently, the AC path filter also does not require high power handling capability, and, unlike the main Tx path, achieving low insertion loss in the AC path is not critical to the overall Tx efficiency. However, unlike [22], this design does not provide any blocker rejection from external interferers, and therefore, as is also the case with many other prototypes reported [11]- [13], [16], [17], [21], this duplexer design would require integration with a blocker tolerant receiver. This design increases complexity in the digital baseband domain, requiring additional DSP resources for generating the AC signal, but this is preferable compared to RF domain complexity.…”

“…Since all of the subsystems in this design have previously been implemented on-chip and have demonstrated the necessary power handling and linearity for cellular applications (e.g., EBDs in [16], [17], [21], active cancellation in [11]- [13], and MEMS tunable filters in [4]), it is clear that integrated circuit implementation of this design is possible. However, rather than fabricating a CMOS prototype to determine on-chip performance, the goal of this work is to experimentally validate the feasibility of the proposed design, prior to embarking on the design of a prototype chip (the function of which also requires system integration with baseband processing, adding substantial complexity to the task).…”

“…Electrical balance duplexers (EBDs) [5], [14]- [22], which implement a form of passive SIC, can be implemented on-chip, are tunable over wide frequency ranges, and have demonstrated the power handling, linearity, and low insertion losses required for cellular handset applications [16], [17], [20], [21]. Likewise, tunable integrated active cancellers have also been demonstrated [11]- [13].…”

“…In [11]- [13], active SIC is used to cancel Tx leakage, however, even with thermal noise and phase noise suppression mechanisms [13], substantial Rx desensitisation is observed. In [13] the Tx band self-interference (SI) was sufficiently suppressed, but the Rx noise figure was degraded to 15.4 dB at a Tx power of only 17 dBm due to limited cancellation of the Tx noise in the Rx band. Conversely, passive SIC can cancel Tx noise, but wideband cancellation requires high RF complexity.…”