An FPGA-based Hardware Accelerator of RANSAC Algorithm for Matching of Images Feature Points

Zhao, Ziwei; Wang, Fei; Ni, Qi

doi:10.1109/asicon47005.2019.8983656

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An FPGA-based Hardware Accelerator of RANSAC Algorithm for Matching of Images Feature Points

Cited by 5 publications

References 7 publications

PESAC, the Generalized Framework for RANSAC-Based Methods on SIMD Computing Platforms

PESAC, the Generalized Framework for RANSAC-Based Methods on SIMD Computing Platforms

Bucket-FEM: A Bucket-based Architecture of Real-time ORB Feature Extraction and Matching for Embedded SLAM Applications

An FPGA-based 3D-2D RANSAC Architecture for Matching Feature Points in RGB-D Slam

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