An improved frequency compensation for three‐stageCMOSamplifier

Abstract

Multi-stage operational amplifiers are considered as basic building blocks in modern electronics since advanced Complementary metal-oxidesemiconductor (CMOS) technology limits exploiting cascode structures due to suffering from low voltage swings and the need of high gain capability. In this regard, an improved and high-performance three-stage CMOS amplifier is proposed in this work. The presented structure modeled mathematically and simulated via HSPICE circuit simulator with the 0.18-μm CMOS technology. An straightforward symbolic calculation is explained to obtain linear transfer function. According to the simulation results, the proposed circuit show 149 dB as DC gain while express 7.3 MHz and 380 μW as gain-bandwidth product and power dissipation, respectively. Such a high-performance amplifier has great potential to realize more complex analog and mixed mode signal systems such as modulators and data convertors.