An UHD 4K@60fps Dual Self-Guided Filter Targeting the AV1 Decoder

Palau, Roberta de Carvalho Nobre; Goebel, Jones; Zummach, Eduardo; Viana, Ramiro; Corrêa, Marcel; Corrêa, Guilherme; Porto, Marcelo; Agostini, Luciano

doi:10.1109/sbcci55532.2022.9893236

Cited by 2 publications

(4 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The only work published in the literature targeting a hardware design for the DSGF AV1 filter is our previous work [32], which was also used as basis for the architecture presented in section IV.B. Thus, no comparisons can be presented for the DSGF results.…”

Section: B Dsgf Synthesis Resultsmentioning

confidence: 99%

“…The hardware was designed focusing on a high processing rate. In order to cover different scenarios, both architectures were evaluated targeting other resolutions/frame rates, such as 4K UHD at 30 fps and FHD at 30 fps, using as a basis our previous results published in [31] and [32].…”

Section: Designed Architecturesmentioning

confidence: 99%

“…For the transform and quantization steps, no published works were found. Six works have been published focusing on the In-loop filtering stage, and five of them were developed in our previous work: [28] and [29] are solutions targeting the CDEF, [30] target the DBF filters, and [31] and [32] target the SLRF filters, respectively for the SSNWF and the DSGF. The sixth work presents a hardware design for the SSNWF targeting the encoder side [33].…”

Section: Introductionmentioning

confidence: 99%

“…The literature presents only two related works targeting the AV1 SLRF at the decoder side ( [31] and [32]), which are previous works from the authors. The main contributions presented in this paper are:…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

High-Throughput Hardware Design for the AV1 Decoder Switchable Loop Restoration Filters

Palau

Penny

Viana

et al. 2023

JICS

View full text Add to dashboard Cite

This paper presents a high-throughput hardware design for the Switchable Loop Restoration Filter (SLRF) of the AOM Video 1 (AV1) video format. This hardware includes the two filters defined at the AV1 SLRF: the Separable Symmetric Normalized Wiener Filter (SSNWF) and the Dual Self- Guided Filter (DSGF). The SLRF is the last step in the AV1 loop restoration filters, and it is used to attenuate blurring artifacts, improving the subjective video quality and the coding efficiency. The designed hardware targeted the AV1 decoderand is able to process up to 4K Ultra-High Definition (4K UHD) videos (with 3840x2160 pixels) at 60 frames per second (fps) in real-time. In order to cover different scenarios, two other target throughputs were also evaluated: 4K UHD at 30fps and Full HD (FHD) (with 1920x1080 pixels) at 30fps. The architectures were synthesized for standard cells using the 40 nm TSMC library. The SSNWF and DSGF architectures used 37.38 Kgates and 177.58 kgates in all evaluated scenarios. Depending on the evaluated scenario, the SSNWF power dissipation varied from 8.25mWto 26.95mWand the DSGF power varied from 57.19 mW to 115.02 mW. This is the first paper in the literature presenting a hardware design for the AV1 SLRF with its two filters.

show abstract

Section: B Dsgf Synthesis Resultsmentioning

confidence: 99%

Section: Designed Architecturesmentioning

confidence: 99%