An ultrawideband CMOS power amplifier using two-stage distributed matching techniques

Abstract

An ultrawideband CMOS power amplifier (PA) with high efficiency, high P1dB, and flat small signal gain is proposed. The CMOS PA uses the distributed amplifier concept to extend the operating bandwidth from 3.1 to 10.6 GHz, and incorporates the active load modulation technique to improve the power-added efficiency (PAE). The active load modulation is realized with two cascode power stages using two different bias classes (class-AB and class-B) to increase the PAE. The experimental results show that the output P1dB is 17.5 dBm with the maximum PAE of 24.6% at 4 GHz. The measured small signal gain is 8 6 0.3 dB from 3.1 to 10.6 GHz. The proposed PA is implemented in a 0.13-lm CMOS process, and the chip area is 0.64 mm 2 including pads.