Analysis of Binary CPFSK With Non-Uniform Sampled Reception

Pons, Jean-Francois; Dehaese, N.; Bourdel, Sylvain; Gaubert, J.; Paille, Bruno

doi:10.1109/tcomm.2015.2391094

Cited by 3 publications

(5 citation statements)

References 27 publications

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“…3(c); it represents the case of a single sampling window, in which all the points are sampled. The use of more than two points per sampling window is out of the scope of this paper, but a solution based on interpolation has been proposed in [17]. It is worth pointing out that the solution shown in Fig.…”

Section: A General Descriptionmentioning

confidence: 99%

“…In this case, the active time is extended beyond t w as needed to let the corresponding components settle before the sampling starts. Furthermore, (17) can also be used to represent the always-ON analog part by setting t ↑,i = t ↓,i = 0 and I ON,i = I OFF,i .…”

Section: A Rf Front Endmentioning

confidence: 99%

“…They can be divided in two groups: 1) RFPG-related and 2) common digital blocks. The latter are modeled using (17) and are considered to be always-ON in the rest of this paper (for example, despreader, MAC, and network layers). Moreover, as shown in Sections II-C and II-D, using a simple two-point estimator may be enough to meet the PER standard requirements with a simple sampling synchronization technique.…”

Section: Digital Componentsmentioning

confidence: 99%

“…In [15], the baseband circuits are duty-cycled, whereas in [16], both LNA and mixer are intermittently shut down. More recently, Pons et al [17] proposes to reduce the RX power consumption by leveraging the analog-to-digital converter (ADC) sampling frequency and by allowing to sample points as close as possible, enabling the use of power-gated ADC [18]. Similarly, we propose to extend this power adaptability to the whole RF RX.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

RF Power Gating: A Low-Power Technique for Adaptive Radios

Pons

Dehaese

Bourdel

et al. 2016

IEEE Trans. VLSI Syst.

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International audienceIn this paper, we propose a low-power technique, called RF power gating, which consists in varying the active time ratio (ATR) of the RF front end at a symbol time scale. This technique is especially well suited to adapt the power consumption of the receiver to the performance needs without changing its architecture. The effect of this technique on the bit error rate (BER) performances is studied for a basic estimator in the specific case of minimum-shift keying signaling. A system-level energy model is also derived and discussed to estimate precisely the power reduction based on the characteristics and the power consumption of each block. This model allows highlighting the different contributors of the power reduction. The BER results and the energy model are finally merged to determine the best ATR meeting the design constraints. Applying this technique to the IEEE 802.15.4 standard, this paper shows that an ATR of 20% is a good tradeoff to meet the packet error rate constraint while maximizing the energy reduction ratio. Using typical block power consumptions, an energy reduction ratio around 20% can be reached. Even better energy reduction ratios (~60%) are also achievable when most of the blocks are power-gated

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Section: A General Descriptionmentioning

confidence: 99%

Section: A Rf Front Endmentioning

confidence: 99%

Section: Digital Componentsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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RF Power Gating: A Low-Power Technique for Adaptive Radios

Pons

Dehaese

Bourdel

et al. 2016

IEEE Trans. VLSI Syst.

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“…CPM is insensitive to the non-linearity of wireless communication systems due to the continuity of its phase information, leading to high-power efficiency. Continuous phase frequency SK (CPFSK) is a special form of CPM, and it has relatively lower demodulation complexity compared with the other forms of CPM signals [9][10][11]. Therefore, CPFSK has drawn great attention during its evolution.…”

Section: Introductionmentioning

confidence: 99%