Analytical and Measurement-Based Method for Diagnosing the Fault of Channels in TSV-Based 3D ICs

Abstract

Three-dimensional integrated circuits (3D ICs) based on through silicon via (TSV) technology can effectively solve many bottlenecks in the development of ICs. It has rapidly developed into a key cutting-edge technology representing the medium and long-term sustainable development of microelectronics industry. Process fluctuation causes TSV process defects, resulting in the change of structural parameters of RDL and TSV interconnection structure. Finally, it leads to the degradation of performance parameters and functional failure of 3D interconnection and devices. Aiming at the high-resistance and open-circuited faults of 3D ICs, this paper develops an analysis method based on micro nano machining and detection technology. The electrical characteristics and images of typical chain TSV interconnections are analyzed by scanning electron microscope high-resolution imaging. The mechanism of fault diagnosis is based on potential difference and electron transfer.