Approximate Computing: A Survey of Recent Trends—Bringing Greenness to Computing and Communication

Barua, Hrishav Bakul; Mondal, Kartick Chandra

doi:10.1007/s40031-019-00418-8

Cited by 43 publications

(11 citation statements)

References 42 publications

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“…Additionally, the increasing demand for high computing resources from diverse wearable applications demands the development of efficient computing techniques that could satisfy not only application requirements but also conserve energy. In this regard, approximate computing or inexact computing have recently emerged as an effective technique where output accuracy is traded for computing time and energy by relying on nearly accurate results [211] (for a detailed discussion on approximate computing refer to Section IV-I.) Similarly, developing in-device signal processing and embedded ML techniques specifically designed for wearables has gained significant attention from the research community [212].…”

Section: Inefficient Routingmentioning

confidence: 99%

Towards Energy Efficiency in the Internet of Wearable Things: A Systematic Review

et al. 2020

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Personal mobile devices such as smartwatches, smart jewelry, and smart clothes have launched a new trend in the Internet of Things (IoT) era, namely the Internet of Wearable Things (IoWT). These wearables are small IoT devices capable of sensing, storing, processing, and exchanging data to assist users by improving their everyday life tasks through various applications. However, the IoWT has also brought new challenges for the research community to address such as increasing demand for enhanced computational power, better communication capabilities, improved security and privacy features, reduced form factor, minimal weight, and better comfort. Most wearables are battery-powered devices that need to be recharged-therefore, the limited battery life remains the bottleneck leading to the need to enhance the energy efficiency of wearables, thus, becoming an active research area. This paper presents a survey of energy-efficient solutions proposed for diverse IoWT applications by following the systematic literature review method. The available techniques published from 2010 to 2020 are scrutinized, and the taxonomy of the available solutions is presented based on the targeted application area. Moreover, a comprehensive qualitative analysis compares the proposed studies in each application area in terms of their advantages, disadvantages, and main contributions. Furthermore, a list of the most significant performance parameters is provided. A more in-depth discussion of the main techniques to enhance wearables' energy efficiency is presented by highlighting the trade-offs involved. Finally, some potential future research directions are highlighted.

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Section: Inefficient Routingmentioning

confidence: 99%

Towards Energy Efficiency in the Internet of Wearable Things: A Systematic Review

et al. 2020

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“…Approximate computing is another promising approach for energy-efficient digital system designs, especially for error-tolerant applications like signal processing in the multimedia domain or neural networks [49]. In this approach, the accuracy requirement of the system is sacrificed at an acceptable level for the sake of performance and energy gains [50].…”

Section: Approximate Stencil Computingmentioning

confidence: 99%

Efficient Acceleration of Stencil Applications through In-Memory Computing

2020

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The traditional computer architectures severely suffer from the bottleneck between the processing elements and memory that is the biggest barrier in front of their scalability. Nevertheless, the amount of data that applications need to process is increasing rapidly, especially after the era of big data and artificial intelligence. This fact forces new constraints in computer architecture design towards more data-centric principles. Therefore, new paradigms such as in-memory and near-memory processors have begun to emerge to counteract the memory bottleneck by bringing memory closer to computation or integrating them. Associative processors are a promising candidate for in-memory computation, which combines the processor and memory in the same location to alleviate the memory bottleneck. One of the applications that need iterative processing of a huge amount of data is stencil codes. Considering this feature, associative processors can provide a paramount advantage for stencil codes. For demonstration, two in-memory associative processor architectures for 2D stencil codes are proposed, implemented by both emerging memristor and traditional SRAM technologies. The proposed architecture achieves a promising efficiency for a variety of stencil applications and thus proves its applicability for scientific stencil computing.

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“…One promising approach to reduce the processing effort is the approximate computing [8]. Approximate computing consists in inserting some level of imprecision at the calculation results to reduce the required computational effort and, as consequence, to reduce the energy consumption.…”

Section: Introductionmentioning

confidence: 99%

Low-Power and High-Throughput Approximated Architecture for AV1 FME Interpolation

Domanski

Kolodziejski²,

Corrêa

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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Modern video encoders like the AOM Video 1 (AV1) implement several complex tools to allow the required high level of compression efficiency. The Fractional Motion Estimation (FME) is one of these tools and in AV1 the FME defines 90 different filters. To handle such complexity, hardware acceleration using approximate computing has become an alternative to be explored. This paper presents an approximate solution for the AV1 FME interpolation filters based on the approximation of the original filter coefficients intending to generate more hardware friendly coefficients. The approximated version was designed in hardware and can achieve real-time interpolation for UHD 8K videos at 30 frames per second, when synthesized using 40nm TSMC standard-cells technology. The designed architecture dissipates 26.79mW which represents more than 80% power reduction when compared to the original precise solution. The approximation implied in a small average coding efficiency degradation of 0.54% in BD-BR. When comparing with related works, this architecture reaches an expressive power reduction (2.1 to 4.8 times) even supporting more complex tools.

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Approximate Computing: A Survey of Recent Trends—Bringing Greenness to Computing and Communication

Cited by 43 publications

References 42 publications

Towards Energy Efficiency in the Internet of Wearable Things: A Systematic Review

Towards Energy Efficiency in the Internet of Wearable Things: A Systematic Review

Efficient Acceleration of Stencil Applications through In-Memory Computing

Low-Power and High-Throughput Approximated Architecture for AV1 FME Interpolation

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