2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design ( 2019
DOI: 10.1109/smacd.2019.8795293
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Artificial Neural Network Assisted Analog IC Sizing Tool

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Cited by 31 publications
(9 citation statements)
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“…Moreover, layout parasitic effects were included in the prediction, which constituted a clear advantage. A significantly different approach was used in [35], wherein the objective was to reduce the convergence time of the evolutionary algorithm that predicted the circuits' design parameters. Data produced from on-going optimization iterations were used to train an NN in parallel, in order to replace the time-consuming SPICE circuit simulators.…”
Section: Hybrid Ic Design Automation Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…Moreover, layout parasitic effects were included in the prediction, which constituted a clear advantage. A significantly different approach was used in [35], wherein the objective was to reduce the convergence time of the evolutionary algorithm that predicted the circuits' design parameters. Data produced from on-going optimization iterations were used to train an NN in parallel, in order to replace the time-consuming SPICE circuit simulators.…”
Section: Hybrid Ic Design Automation Methodsmentioning
confidence: 99%
“…Hybrid methods combining global optimization and NN were proposed in [32][33][34][35][36][37]. These techniques achieve enhanced results compared to pure multi-objective optimization methods, at a lower computation time.…”
mentioning
confidence: 99%
“…The performance of the circuit is predicted by replacing the trained NN instead of a simulated system in the optimization loop, thus reducing the design time substantially. The execution time issue is faster in this case as the new performance and output result are predicted from the previous data without performing simulation [6].…”
Section: Neural Network Techniquementioning
confidence: 99%
“…Neural networks are very effective tools used in various design steps of analog and RF circuits [43][44][45]. They are as a 'black-box' modeling and are exerted in modeling of onchip inductors [46], semiconductor devices [47], conventional analog circuit building blocks [48,49], analog IC sizing [6,50], and in crucial RF circuit blocks such as power amplifiers [51], RF front-end receivers [52], low noise amplifiers [53], voltage-controlled oscillators [54,55], and multiple-input multiple-output (MIMO) systems [56,57].…”
Section: Neural Network Techniquementioning
confidence: 99%
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