Automata Processor Architecture and Applications: A Survey

Abstract

Finite automata-based algorithms are becoming increasingly important for a wide range of application domains to process large volumes of unstructured data. Current processor technologies are not well suited to accelerate massively parallel operations related to the search and analysis of complex and unstructured data streams pattern identification problems. Hardware designers are exploring new processing technologies to accelerate pattern identification problems. One such technology is the recently introduced Micron Automata Processor (AP), which is a novel and powerful reconfigurable non-von Neumann processor that can be used for direct implementation of multiple Non-deterministic Finite Automata (NFAs) running concurrently on the same input stream. AP has a linear-scalable, two-dimensional MISD (Multiple Instruction Single Data) fabric comprised of thousands of interconnected small processing elements called State Transition Elements (STEs) to analyze complex data streams simultaneously to accelerate solving massively complex problems. The AP is promising future technology which provides new operations and new avenues for exploiting parallelism to accelerate the growing and important class of automata-based algorithms. In this paper, we present a survey of the state-of-the-art in automata processor based hardware accelerators. We describe AP hardware architecture, its programming environments, summarize its current successful applications in a wide range of diverse fields and explore future research trends and opportunities in this increasingly important area of automata computing paradigm.