2016 29th IEEE International System-on-Chip Conference (SOCC) 2016
DOI: 10.1109/socc.2016.7905462
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Automated Full Chip SPICE simulations with self-checking assertions for last mile verification & first pass Silicon of mixed signal SoCs

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Cited by 4 publications
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“…The work of Harinarayana et al [10] presented an automated verification model for mixed-signal SoCs designed for modern application by integrating analog, digital and mixed signals. The verification is performed at different levels and different modes.…”
Section: Introductionmentioning
confidence: 99%
“…The work of Harinarayana et al [10] presented an automated verification model for mixed-signal SoCs designed for modern application by integrating analog, digital and mixed signals. The verification is performed at different levels and different modes.…”
Section: Introductionmentioning
confidence: 99%