Automatic Generation of Application-Specific FPGA Overlays with RapidWright

Mbongue, Joel Mandebi; Kwadjo, Danielle Tchuinkou; Bobda, Christophe

doi:10.1109/icfpt47387.2019.00053

Cited by 6 publications

(1 citation statement)

References 9 publications

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“…In other words, the mapping of application to CPUs and FPGAs does not change. This static model is highly effective for settings where the CPU/FPGA hardware is exclusively used for a single application, and the reconfigurable logic literature has intensively studied various problems in this space such as how to implement functions on FPGAs for optimal performance [36] [15] [24] [29] and how to improve FPGA programming [39] [42].…”

Section: Introductionmentioning

confidence: 99%

Xar-Trek: Run-time Execution Migration among FPGAs and Heterogeneous-ISA CPUs

Horta,

Chuang,

VSathish

et al. 2021

Preprint

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Datacenter servers are increasingly heterogeneous: from x86 host CPUs, to ARM or RISC-V CPUs in NICs/SSDs, to FPGAs. Previous works have demonstrated that migrating application execution at run-time across heterogeneous-ISA CPUs can yield significant performance and energy gains, with relatively little programmer effort. However, FPGAs have often been overlooked in that context: hardware acceleration using FPGAs involves statically implementing select application functions, which prohibits dynamic and transparent migration. We present Xar-Trek, a new compiler and run-time software framework that overcomes this limitation. Xar-Trek compiles an application for several CPU ISAs and select application functions for acceleration on an FPGA, allowing execution migration between heterogeneous-ISA CPUs and FPGAs at run-time. Xar-Trek's run-time monitors server workloads and migrates application functions to an FPGA or to heterogeneous-ISA CPUs based on a scheduling policy. We develop a heuristic policy that uses application workload profiles to make scheduling decisions. Our evaluations conducted on a system with x86-64 server CPUs, ARM64 server CPUs, and an Alveo accelerator card reveal 88%-1% performance gains over no-migration baselines.CCS Concepts: • Computer systems organization → Reconfigurable computing; Heterogeneous (hybrid) systems; High-level language architectures; • Applied computing → Data centers.

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