Ca & Sbo : A Novel Optimized Placement Algorithms for an Efficient Vlsi Design

Abstract

Designing a simplest architecture involves appropriate placement, which is often, regarded as a critical concerns of physical design engineers. Placement and routing of chips in automated manner is been research since decades and provides better predictive performance than manual procedures. However, most of the automated models operating under meta-heuristic optimization fails in obtaining optimal solution due to premature convergence and non-optimal placement of solutions. In this paper, we develop a novel meta-heuristic optimization method namely Cellular Automata (CA) and Satin Bowerbird Optimization (SBO) that combines Primal-dual lagrangian technique (SimPL) and Complex Primal dual lagrangian (ComPL) for attaining optimal placement and routing of chips. The process of CA and SBO optimization approach operates on obtaining optimized placement solutions from the SimPL and ComPL solutions. The combination of CA-SimPL, SBO-SimPL, CA-ComPL and SBO-ComPL is implemented on electronic design automation (EDA) tools with python simulator for pre-training and fine-tuning the optimization model. The simulation is conducted on a high-end computing system to test the computational time speed up ratio on different threads and half-perimeter wire length (HWPL). The results of simulation shows that the proposed models obtain increased performance with reduced computational time than other methods.