Cascaded H-Bridge Multilevel Inverter Using SPWM and MSPWM Strategies

Abstract

Nowadays, the multilevel inverter is growing hugely in medium voltage-high power applications. It produces staircase output voltage near sinusoidal waveform. The multilevel inverter is as compared to a two level inverter has high output voltage at high switching frequency , less EMI (electro-magnetic interference), lower THD (total harmonics distortion), low voltage stress (dv/dt) and it reduces the size of the filter components. In this paper various techniques cascaded H-bridges inverter are designed and implemented. Single phase sinusoidal pulse width modulation (SPWM) and modified sinusoidal pulse width modulation (MSPWM) topologies of (three, five and seven) levels inverters are designed and implemented. The results in percentage value of THD before and after filter are compared. The simulink/matlab and proteus are used to simulate the systems and finally, result are obtained experimentally using microcontroller (arduino mega 2560). When the number of levels is increased using SPWM technique the THD reduced, THD improves in MSPWM technique too, and comparison table II illustrated that.