Cell phone integration: SiP, SoC, and PoP

Rickert, Peter; Krenik, W.

doi:10.1109/mdt.2006.64

Cited by 19 publications

(5 citation statements)

References 8 publications

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“…3D packaging technology: It is enabled by wire bonding, flip-chip bonding, and thinned die-to-die bonding [14]. As the most mature 3D integration technology, it is already being used in many commercial products, noticeably in cell phones [24,53]. Its major limitation is very low inter-die interconnect density (e.g., only few hundreds of inter-die bonding wires) compared to the other emerging 3D integration technologies.…”

Section: Overview Of 3d Integration Technologymentioning

confidence: 99%

DSP Systems using Three-Dimensional (3D) Integration Technology

Zhang¹,

Pan²,

Li³

2010

Handbook of Signal Processing Systems

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As three-dimensional (3D) integration technology is quickly maturing and steadily entering mainstream markets, it has begun to attract exploding interest from integrated circuit and system designers. This chapter discusses and demonstrates the exciting opportunities and potentials for digital signal processing (DSP) circuit and system designers to exploit 3D integration technology. In particular, this chapter advocates a 3D logic-DRAM integration paradigm and addresses the use of 3D logic-memory integration in both programmable digital signal processors and application-specific digital signal processing circuits. To further demonstrate the potential, this chapter presents case studies on applying 3D logic-DRAM integration to clustered VLIW (very long instruction word) digital signal processors and application-specific video encoders. Since DSP systems using 3D integration technology is still in its research infancy, by presenting some first discussions and results, the aim of this chapter is to motivate greater future efforts from DSP system research community to explore this new and rewarding research area.

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Section: Overview Of 3d Integration Technologymentioning

confidence: 99%

DSP Systems using Three-Dimensional (3D) Integration Technology

Zhang¹,

Pan²,

Li³

2010

Handbook of Signal Processing Systems

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“…The stacking of complete packages in so called Package on Package solutions has also become very feasible especially for handheld electronics [1] [2]. Aside to these well-known miniaturization efforts the embedding technology has continuously been developed in the last two decades.…”

Section: Introduction -Component Embedding For Smart Structures With mentioning

confidence: 99%

Reliability of embedding concepts for discrete passive components in organic circuit boards

Schwerz

Boehme

Roellig

et al. 2013

2013 IEEE 63rd Electronic Components and Technology Conference

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This work presents the research towards two promising embedding approaches for electronic components with a possible application to integrate a sensor node for structural health monitoring into the structure itself. The production process for both integration methods has been assessed through experimental and simulation effort. Samples with passive components for both presented approaches have been successfully built. To evaluate the quality of the integration processes, the embedding samples along with regular SMT assemblies were subsequently tested towards reliability using tensile and temperature cycling tests with in-situ measurement. Both testing methods have also been supported with advanced finite element modeling to understand the structural behavior for the integration. The results have shown that both approaches can successfully be applied to integrate electronics into organic material. It was also found that the damage mechanism during the thermo mechanical loading for embedded components differs from conventional SMT assembly because the solder is completely fixated. With a correct manufacturing process this will yield an increase of life time for the electronics

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“…With the development of handheld application, 3D(three dimensional) packages, including POP and Package-interposer-Package (PIP), become more and more popular due to integrated functions and package area [1][2]. POP, as one type of stacked package, has widely influence in the market.…”

Section: Introductionmentioning

confidence: 99%

A Novel Method for POP Stacking Warpage

Shi

Chen

Xiao

et al. 2012

AMM

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With the miniaturization of portable products, integrate circuit becomes thinner, the effect of warpage on Package-on-Package (POP) stacking assemble on integrate circuit have become more distinct. It will lead to the deformation of the chip substrate and the more serious effectiveness of the solder joint. Consequently, in this paper, a novel method by adding fixed metal pillars in the middle of POP stacking substrates can well suppress warpage problems caused by the uneven heating reflow materials. Finally, this new method is feasible by analyzing the stress of warp model.

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Cell phone integration: SiP, SoC, and PoP

Cited by 19 publications

References 8 publications

DSP Systems using Three-Dimensional (3D) Integration Technology

DSP Systems using Three-Dimensional (3D) Integration Technology

Reliability of embedding concepts for discrete passive components in organic circuit boards

A Novel Method for POP Stacking Warpage

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