Characterization of the column-based priority logic readout of Topmetal-II⁻CMOS pixel direct charge sensor

Abstract

We present the detailed study of the digital readout of Topmetal-II -CMOS pixel direct charge sensor. Topmetal-IIis an integrated sensor with an array of 72 × 72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators with individually DAC settable thresholds in each pixel. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic is fully combinational hence there is no clock distributed in the pixel array. Sequential logic and clock are placed on the peripheral of the array. We studied the detailed working behavior and performance of this readout, and demonstrated its potential in imaging applications.