Chip-to-Chip Interconnects Using Integrated Antennas

Abstract

In this work we have investigated the possibility to use parts of the CMOS integrated circuit ground planes as antennas for wireless chip-to-chip interconnects. Exemplary antenna configurations have been simulated. The interference between the digital circuit and the antenna has been investigated. Scaled models have been manufactured and measured in order to validate the simulation data.

Integrated on-chip antennas for communication on and between monolithic integrated circuits

“…This assumption, as shown in [12], is justified for the interconnects, which are located underneath the antenna patches, but the interconnects, which connect the areas under separate patches (see Fig. This assumption, as shown in [12], is justified for the interconnects, which are located underneath the antenna patches, but the interconnects, which connect the areas under separate patches (see Fig.…”

“…The discussion in the previous section neglected the influence of the electronic circuit interconnects. This assumption, as shown in [12], is justified for the interconnects, which are located underneath the antenna patches, but the interconnects, which connect the areas under separate patches (see Fig. 1(c)) have a severe effect on the input impedance.…”

“…The approach, proposed in this work, is based on the sharing of chip area between the integrated circuit and the antenna [12]. This is achieved by subdividing the CMOS circuit ground plane into parts and using these parts as antenna electrodes.…”

Antennas embedded in CMOS integrated circuits

“…In the previous discussion the influence of the interconnects has been neglected. This assumption can be justified for interconnects, located underneath the patches [8], but not for the interconnects across the gap between the patches. As discussed in the previous section, the antenna electric field is mostly concentrated in the gap between the patches, therefore introduction of conductors in the gap will perturb the standing wave pattern and thus the antenna resonance frequency and input impedance will be changed.…”

Chip-to-Chip and On-Chip Communications

“…Furthermore, chip surface is a cost factor and should not be wasted for antennas. An integrated on-chip antenna for chip-to-chip wireless communication, based on the usage of the digital circuits' ground planes as radiating elements was presented in [12][13][14][15][16][17]. Figure 5 a shows schematically the realization of this principle in slicon technology.…”