2024 4th International Conference on Pervasive Computing and Social Networking (ICPCSN) 2024
DOI: 10.1109/icpcsn62568.2024.00170
|View full text |Cite
|
Sign up to set email alerts
|

CMOS VLSI Implementation of Implicit Pulsed Dual Edge Triggered Flip Flop using Pass Transistor Logic for Power Efficient Applications

P. Nagarajan,
N. Ashokkumar,
Kavitha Thandapani
et al.
Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

0
0
0

Publication Types

Select...

Relationship

0
0

Authors

Journals

citations
Cited by 0 publications
references
References 12 publications
0
0
0
Order By: Relevance

No citations

Set email alert for when this publication receives citations?