CMOS X‐band pole‐converging triple‐cascode LNA with low‐noise and wideband performance

Cao, Cheng; Li, Yubing; Wang, Zhe; Huang, Zemeng; Tan, Tao; Chen, Deyang; Li, Xiuping

doi:10.1049/cds2.12081

Cited by 6 publications

(3 citation statements)

References 34 publications

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“…However, the gate‐to‐source and gate‐to‐drain capacitances are degraded by 4% and 36%, respectively that reduced the speed of the input stage. Cheng Cao et al 28 suggested a CMOS pole‐converging triple‐cascode LNA in which a pole‐converging capacitor is integrated between the gate and drain node of the common‐gate stage and resulted in a pole‐converging effect and wideband performance. The altered broadband simultaneous noise and input‐matching technique was employed in triple‐cascode configuration to realize good input matching and a low NF.…”

Section: Literature Surveymentioning

confidence: 99%

Blocker tolerant cascode LNA for Wifi & IoT applications

Das,

Ramanaiah

2024

Int J Communication

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SummaryWithin the domain of contemporary wireless communication systems, crafting Low‐Noise Amplifiers (LNA) holds a pivotal significance in achieving heightened signal sensitivity and comprehensive system efficacy and suppresses noise contributions from subsequent stages. Additionally, the low noise figure (NF) and high gain are critical LNA performance parameters in portable applications. Normally, LNA contains issues in noise performance, amplification, bandwidth, gain, and stability. To overcome these challenges, there must be a proper selection of transistors, harmonious impedance calibration, bias optimization, and circuit fine‐tuning. Moreover, metal oxide semiconductor field effect transistors (MOSFETs) are a popular choice in LNA design because of their excellent noise performance, high input impedance, complementary metal‐oxide semiconductor (CMOS) integration capabilities, low power operation, and suitability for a wide range of frequency applications. Through simulation and iterative enhancement, the LNA showcases remarkable Noise Figure, amplification, and linearity over a designated frequency span. This creation contributes to the advancement of radio frequency (RF) circuitry by designing an approach for LNA crafting that harmonizes conflicting prerequisites and unveils effective noise mitigation tactics. The outcomes emphasize the importance of a deliberated circuit architecture and parameter adjustment in accomplishing superlative LNA capabilities, rendering it fit for assimilation into diverse communication systems that demand minimal noise and heightened sensitivity.

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Section: Literature Surveymentioning

confidence: 99%

Blocker tolerant cascode LNA for Wifi & IoT applications

Das,

Ramanaiah

2024

Int J Communication

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“…There have been recent reports for designing and fabricating GaAs‐based LNAs, 3–5 switches, 6,7 and multiphase clock generators, 8 using 0.15 and 0.25 μm technology. LNAs based on other competitive technologies, CMOS, 9–13 and SiGe BiCMOS 14,15 have also been reported in the literature recently. CMOS technology has the advantage of high integration density and low cost, 16 whereas GaAs 1 and SiGe 17 have better noise performances.…”

Section: Introductionmentioning

confidence: 99%

Design and robustness improvement of high‐performance LNA using 0.15 μm GaN technology for X‐band applications

Zafar

Akoglu

Aras

et al. 2022

Circuit Theory & Apps

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In this paper, we present a highly robust GaN-based X-band low-noise amplifier (LNA) showing promising small-signal and noise performance as well as good linearity. The LNA is fabricated using in-house 0.15 μm AlGaN/GaN on a SiC HEMT process. Owing to the optimum choice of HEMT topologies and simultaneous matching technique, LNA achieves a noise figure better than 2 dB, output power at 1 dB gain compression higher than 19 dB, input and output reflection coefficients better than À9 and À11 dB, respectively. The small-signal gain of LNA is more than 19 dB for the whole band, and NF has a minimum of 1.74 dB at 10.2 GHz. LNA obtains an OIP3 up to 34.2 dBm and survives input power as high as 42 dBm. Survivability is investigated in terms of gain compression and forward gate current. Reverse recovery time (RRT), a crucial parameter for radar front-ends, is explored with respect to the RC time constant and trap phenomenon. The analysis shows that the significant contribution in RRT is due to traps while the RC time constant is in the nanoseconds range. Moreover, this study also addresses the requirement and choice of a DC gate feed resistor for the subsequent stages in a multi-stage design. The size of the designed LNA chip is 3 mm Â 1.2 mm only.

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“…Kumar and Rebeiz 9 have proposed X‐ and K‐band LNAs with a method of noise match optimization with respect to the base inductor in a 0.18 μm SiGe HBT technology. Cao et al 12 have proposed a pole converging technique to improve the noise figure (NF) over a broad range from 8 to 12 GHz using 0.13 μm CMOS technology. Zailer et al 13 have demonstrated a method based on transistor size selection, that is, Cgs and simultaneous bias, to minimize the difference between NF and NF min using 0.13 μm CMOS inductive source degenerated (ISD) cascode LNA.…”

Section: Introductionmentioning

confidence: 99%

Design ofGaN‐basedX‐band LNAsto achieve sub‐1.2 dBnoise figure

Zafar

Aras

Akoglu

et al. 2022

Int J RF Mic Comp-Aid Eng

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GaAs and SiGe technologies take an edge over GaN-based devices in terms of better noise figure (NF). In this article, we present HEMT topologies and design techniques to achieve a sub-1.2 dB NF for a GaN-based X-band lownoise amplifier (LNA). This NF is comparable with state-of-the-art reported works in competitive GaAs and SiGe technologies. Moreover, this is the best reported NF in X-band using GaN technology to date. Two LNAs are fabricated using in-house 0.15 μm AlGaN/GaN on the SiC HEMT process. LNA-1 has inductive source degenerated (ISD) HEMTs at both stages, while LNA-2 has ISD HEMT at the first and common source at the second stage. The significance of ISD HEMT, for the first or subsequent stages in a multi-stage design, towards NF improvement is addressed. The criticality of stability networks towards NF contribution and its design is discussed in detail. Furthermore, even-mode stability of each HEMT after complete LNA design is assured using the S-probe method in Pathwave Advanced Design Systems.

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CMOS X‐band pole‐converging triple‐cascode LNA with low‐noise and wideband performance

Cited by 6 publications

References 34 publications

Blocker tolerant cascode LNA for Wifi & IoT applications

Blocker tolerant cascode LNA for Wifi & IoT applications

Design and robustness improvement of high‐performance LNA using 0.15 μm GaN technology for X‐band applications

Design ofGaN‐basedX‐band LNAsto achieve sub‐1.2 dBnoise figure

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