Compact single‐level and multilevel folded‐line RF power dividers

Abstract

A complex circuit from [9] is simulated to further verify the method proposed in this paper. This circuit consists of two interconnect components, namely, a uniform microstrip and a microstrip stub, as shown in Figure 4. The substrate is 0.6-mm thick, the source and load resistance are both 50⍀, and the applied voltage source is two sinusoidal signals with respective frequencies of 2.23 GHz and 2 GHz.The 3D FDTD method is employed to simulate the uniform microstrip and microstrip stub circuit and to obtain their respective Y parameters. Both of the unit cell sizes in the FDTD simulation are ⌬x ϭ ⌬y ϭ 0.1 mm, ⌬z ϭ 0.2 mm, the time step is ⌬t ϭ 0.2 ps, and the total grid size is 46⌬x ϫ 36⌬y ϫ 15⌬z for the uniform microstrip and 110⌬x ϫ 115⌬y ϫ 15⌬z for the stub.Figures 5 and 6 illustrate the Y parameters obtained from this microstrip circuits by using the VFM-based macromodel. This again demonstrates that the VFM can achieve good accuracy.The transient simulation results of the overall circuit in Figure 4 are shown in Figure 7. These results are very much similar to that in [9] and the quantity discrepancy is ascribed to the difference of the diode model and microstrip geometry. CONCLUSIONThe integrated macromodeling method proposed in this paper is an accurate approach to address the high-speed interconnect problem, which is based on a rational function approximation of the Y-parameter transfer function from the full-wave FDTD simulation and equivalent circuit approach in the context of a SPICE simulator. The VFM employed for rational function approximation in this paper provides a considerably accurate way to construct the macromodel of the interconnect subnetwork. Conversion of the interconnect macromodel to an equivalent circuit can facilitate the signal integrity analysis, involving both distributed interconnect and linear/nonlinear circuit components, by using SPICE circuit simulation. Signal integrity analysis of large hybrid interconnect and circuit problems using this approach will be further studied in the future.

Wideband and Compact Wilkinson Power Divider Utilizing Series Delta-Stub and Folded Stepped-Impedance Transmission Line

“…Recently, the design of WPD has adopted many techniques [2][3][4][5][6][7][8][9][10][11][12] to miniaturize the circuit size of the power divider, nevertheless, these techniques suffered serious degradation of the return-loss bandwidth compared with the conventional structure. For instance, in [9], the WPD was proposed using two-section asymmetrical T-structures to achieve a significant size reduction.…”

“…In [7], they proposed a new idea based on SITL to compact the quarter wave length transmission lines in the WPD. According to [11], [12], folding stepped-impedance transmission line (FSITL) can provide a more compact circuit size. Even though, these approaches can provide up to 60-80% circuit size reductions, they have limited bandwidths.…”