Computation of prime factor DFT and DHT/DCCT algorithms using cyclic and skew-cyclic bit-serial semisystolic IC convolvers

Gudvangen, S.; Holt, A.G.J.

doi:10.1049/ip-g-2.1990.0059

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Computation of prime factor DFT and DHT/DCCT algorithms using cyclic and skew-cyclic bit-serial semisystolic IC convolvers

Cited by 4 publications

References 19 publications

Design and realisation of a new hardware efficient IP core for the 1-D discrete Fourier transform

Design and realisation of a new hardware efficient IP core for the 1-D discrete Fourier transform

Hardware-efficient DFT designs with cyclic convolution and subexpression sharing

A new hardware efficient design for the one dimensional discrete Fourier transform

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