Computationally efficient low-power sigma delta modulation-based image processing algorithm

Abstract

Digital Image Processing has dominated Digital Signal Processing at the cost of more memory, resources, and high computational power. In image processing, filtering transformations and other operations need complex multiplications, and the multiplier is one of the most resources consuming elements. Recently, mitigating the multiplier complexity in the digital signal processing (DSP) algorithms sigma-delta modulation based general purpose and adaptive DSP algorithms are developed in MATLAB and compared with its counterpart multi-bit algorithms for functionality and area-performance-power in FPGA. The contemporary multiplier algorithms are also optimized to overcome the multiplier complexity challenge as computation becomes simple and fast. This paper extends the reported work by investigating the sigma-delta modulation approaches for developing a computationally efficient low-power image processing algorithm. The proposed model is designed, developed, and simulated in MATLAB. The simulation results are analyzed using SNR, MSE, and Peak SNR. The simulation results show that the proposed system can better mitigate the noise effect, making it robust for noisy environment.

A Novel Approach Toward Algorithm Architecture Co-Optimization for the Application of Adaptive Noise Cancellation for Wireless Communication

“…One of the latest methods of resource reduction in ASIC or or partially transformed to single-bit) [8][9][10][11][12][13][14][15], IIR filters [16][17][18], and some complex adaptive filter structures [19][20][21][22]. Other recent examples of SDM-based short word length systems include adaptive channel equalizers using a µless approach [23], Weiner filters [24], Matched filters [25], digital arithmetic units [26], smart sensor communications [27], correlation-less filters [28,29] and latest SDM-Based Image Processing [30].…”