Computer representation of Venn and Euler diagrams

Wijesinghe, Diunuge B.; Ranathunga, Surangika; Dias, Gihan

doi:10.1109/icter.2016.7829905

Cited by 4 publications

(2 citation statements)

References 17 publications

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“…Los diagramas de Venn, son útiles en múltiples aplicaciones computacionales [1] e incluso podrían solucionar el problema de generar consultas SQL usando el álgebra relacional. Esto tecnológicamente sería un avance, ya que el testeo de consultas no siempre es una tarea fácil [2].…”

Section: Introductionunclassified

Arquitectura para la generación de consultas SQL usando lógica de conjuntos

Silva¹,

Palacios²

2018

Vis. Electron.

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Historia del artículo:El presente artículo muestra, la arquitectura implementada en el desarrollo de una herramienta generadora de código SQL, concretamente código de consulta entre varias tablas, en donde se desean hacer operaciones que guardan relación con las operaciones de JOIN entre tablas. La herramienta explota el uso de LEFT JOIN, RIGHT JOIN, INNER JOIN Y FULL OUTHER JOIN. La arquitectura propuesta funciona para una gran cantidad de tablas, sin embargo, la herramienta por razones de eficiencia computacional en esta versión permite hasta tres tablas. La metáfora que sigue el generador de código SQL, es la metáfora impuesta por los diagramas de Venn, la cual es útil en múltiples aplicaciones computacionales y en este artículo se usó para la construcción de un generador de código en donde el usuario selecciona un diagrama de Venn concreto. Al final del artículo se muestran las modificaciones que se hace necesario implementar a la arquitectura para agregar otras funcionalidades.This article shows the architecture implemented in the development of an SQL code generating tool (query code) between several tables, where it is desired to perform operations that are related to JOIN operations between tables. The tool exploits the use of LEFT JOIN, RIGHT JOIN, INNER JOIN and FULL OUTHER JOIN. The proposed architecture works for a large number of tables; however, the tool for reasons of computational efficiency in this version, allows up to three tables. The metaphor that follows the SQL code generator, is the metaphor imposed by Venn diagrams, which is useful in multiple computational applications and, in this article, it was used for the construction of a code generator, in which the user selects a concrete Venn diagram. At the end of the article, we show the modifications that are necessary to implement in the architecture, to add other functionalities. Palabras clave: Algebra relacional Generador de códigos Herramientas case Lógica de conjuntos Sentencias SQL Keywords: Relational algebra Code generator Tools case Logic set SQL statements Citar este artículo como: L. F. Wanumen y D. J. Mosquera, "Arquitectura para la generación de consultas SQL usando lógica de conjuntos". Visión Electrónica, algo más que un estado sólido, Vol. 12, No. 2, 307-318, julio-diciembre 2018. https://doi.

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Section: Introductionunclassified

Arquitectura para la generación de consultas SQL usando lógica de conjuntos

Silva¹,

Palacios²

2018

Vis. Electron.

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“…The report shows the number of lines propense to EM failure, Ąltered with the maximum current density and the Blech product. The critical and non-critical lines are also reported in a Venn Diagram [201], which shows the number of critical and non-critical lines according to the EM criteria.…”

Section: Tool Descriptionmentioning

confidence: 99%

Study of electromigration in integrated circuits at design level

Nunes¹

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Electromigration damage in interconnects is a well-known bottleneck of integrated circuits, because it causes reliability problems. Operation at high temperatures and current densities accelerates the damage, increasing the interconnect resistance and, therefore, reducing the circuit lifetime. This issue has been accentuated with the technology downscaling. To guarantee the interconnect reliability and, as a consequence, the integrated circuit reliability, traditional methods based on the so-called Blech Effect and on the maximum allowed current density are implemented during interconnect design. These methods, however, do not take into account the impact of the electromigration on the circuit performance.In this work the traditional approach is extended and a method to evaluate the effect of the electromigration in an integrated circuit performance is developed. The method is implemented in a tool which identiĄes the critical interconnect lines of an integrated circuit and suggests the proper interconnect width based on different criteria to mitigate the electromigration damage and to increase the reliability. In addition, the variation of performance parameters of the circuit as an interconnect resistance changes is determined.The tool is incorporated into the design Ćow of the integrated circuit and uses the data from design kits and reports directly available from the design environment.An accurate analysis of the temperature distribution on the interconnect structure is essential to a better assessment of the interconnect reliability. Therefore, a model to compute the temperature on each metallization level of the interconnect structure is implemented.The temperature distribution on the metallization layers of different technologies is investigated. It is shown that the temperature in the Metal 1 of the Intel 10 nm can increase by 75 K, 12 K higher than in the Metal 2. As expected, the layers that are closer to the transistors undergo a more signiĄcant temperature increase.The tool is applied to evaluate the interconnects and the robustness of different circuits, namely a ring oscillator, a bandgap voltage reference circuit, and an operational ampliĄer, against electromigration. The operational ampliĄer, in particular, is thoroughly studied.The proposed methodology identiĄes critical interconnects which under electromigration cause large variations in the performance of the circuit. In a worst-case scenario, the cutoff frequency of the circuit varies by 65% in 5 years of operation. An interesting Ąnding is that the proposed methodology identiĄes critical interconnects which would not be identiĄed by the traditional criteria. These interconnects have current densities below the limit recommended by the design rules. Nevertheless, one of such an interconnect leads to a variation of 30% in the gain of the operational ampliĄer. In summary, the proposed tool veriĄed that from the 20% paths with a critical current density, only 3% degrades signiĄcantly the circuit performance.This work brings the study of the reli...

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