Corundum: An Open-Source 100-Gbps Nic

Forencich, Alex; Snoeren, Alex C.; Porter, George; Papen, George C.

doi:10.1109/fccm48280.2020.00015

Cited by 69 publications

(37 citation statements)

References 9 publications

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“…The first is an SV-based RISC-V core called cv32e40p [29] where we show the model accuracy convergence. Then we exploit an open-source, high-performance FPGA-based NIC [32], called Corundum, where we explore the design space of a Verilog submodule and we showcase non-dominant solutions. We move then to Neorv32 [33], a VHDL-based RISC-V core, where we apply the power of two restrictions to explore core memories space.…”

Section: Experimental Setup and Resultsmentioning

confidence: 99%

See 1 more Smart Citation

Dovado: An Open-Source Design Space Exploration Framework

Paletti

Conficconi

Santambrogio

2021

2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)

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Traditional hardware development exploits description languages such as VHDL and (System)Verilog to produce highly parametrizable RTL designs. Different parameter values yield different utilization-frequency trade-offs, and handtuning is not feasible with a non-trivial amount of parameters. Generally, the Computer-Aided Design (CAD) literature proposes approaches that mainly tackle automatic exploration without combining a design automation feature. Hence, this work proposes Dovado, an open-source CAD tool for design space exploration (DSE) tailored for FPGAs-based designs. Starting from VHDL/(System)Verilog, Dovado exploits Vivado and supports the hardware developer for an exact exploration of a given set of parameters or a DSE where it returns the nondominated set of configuration points. In this work, we exploit a multi-objective integer formulation and Non-Dominated Sorting Genetic Algorithm (NSGA)-II for a fast DSE. Moreover, we propose an approximation model for the NSGA-II fitness function to decide whether Vivado or a Nadaraya-Watson model should estimate the optimization metrics.

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Section: Experimental Setup and Resultsmentioning

confidence: 99%

“…Corundum is an open-source, high-performance FPGAbased NIC [32] written in Verilog. We targeted the same Kintex-7 FPGA disabling the approximator model to employ direct Vivado evaluations.…”

Section: B Corundum: Verilog Network Interface Cardmentioning

confidence: 99%

Dovado: An Open-Source Design Space Exploration Framework

Paletti

Conficconi

Santambrogio

2021

2021 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)

View full text Add to dashboard Cite

show abstract

“…The most recent version (FPGA SUME) couples a Xilinx Virtex 7 FPGA with four 10Gb Ethernet ports [209]. A more recent effort in this direction is Corundum [61], which provides an open source platform for implementing a 100Gbps NIC on FPGA. Corundum is a collection of the basic NIC modules and building blocks, which are ready to be implemented on several commercial FPGA cards.…”

Section: Field-programmable Gate Arraysmentioning

confidence: 99%

The Programmable Data Plane

Michel

Bifulco²,

Rétvári

et al. 2021

ACM Comput. Surv.

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Programmable data plane technologies enable the systematic reconfiguration of the low-level processing steps applied to network packets and are key drivers toward realizing the next generation of network services and applications. This survey presents recent trends and issues in the design and implementation of programmable network devices, focusing on prominent abstractions, architectures, algorithms, and applications proposed, debated, and realized over the past years. We elaborate on the trends that led to the emergence of this technology and highlight the most important pointers from the literature, casting different taxonomies for the field, and identifying avenues for future research.

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“…However, an FPGA first needs to function as an NIC to be an accelerator for a software data plane. Although the FPGA proved to be a basic NIC performing basic packet transmitting and receiving functions [33,34], many other features, such as supporting for SR-IOV and DPDK, that are commonly implemented for NICs are challenging to implement on FPGAs [35]. Therefore, the FSNIC [23,24] is the best hardware to implement the accelerator for a software data plane.…”

Section: Evaluating Fsnic As Acceleratormentioning

confidence: 99%

AccelSDP: A Reconfigurable Accelerator for Software Data Plane Based on FPGA SmartNIC

et al. 2021

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Software-defined networking (SDN) has attracted much attention since it was proposed. The architecture of the SDN data plane is also evolving. To support the flexibility of the data plane, the software implementation approach is adopted. The software data plane of SDN is commonly implemented on a commercial off-the-shelf (COTS) server, executing an entire processing logic on a commodity CPU. With sharp increases in network capacity, CPU-based packet processing is overwhelmed. However, completely implementing the data plane on hardware weakens the flexibility. Therefore, hybrid implementation where a hardware device is adopted as the accelerator is proposed to balance the performance and flexibility. We propose an FPGA SmartNIC-based reconfigurable accelerator to offload some of the operation-intensive packet processing functions from the software data plane to reconfigurable hardware, thus improving the overall data plane performance while retaining flexibility. The accelerated software data plane has a powerful line-rate packet processing capability and flexible programmability at 100 Gbps and higher throughput. We offloaded a cached-rule table to the proposed accelerator and tested its performance with 100 GbE traffic. Compared with the software implementation, the evaluation result shows that the throughput can achieve a 600% improvement when processing small packets and a 100% increase in large packet processing, and the latency can be reduced by about 20× and 100×, respectively, when processing small packets and large packets.

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Corundum: An Open-Source 100-Gbps Nic

Cited by 69 publications

References 9 publications

Dovado: An Open-Source Design Space Exploration Framework

Dovado: An Open-Source Design Space Exploration Framework

The Programmable Data Plane

AccelSDP: A Reconfigurable Accelerator for Software Data Plane Based on FPGA SmartNIC

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