Crossbar architecture based on 2R complementary resistive switching memory cell

Abstract

Emerging non-volatile memories (e.g. STT-MRAM, OxRRAM and CBRAM) based on resistive switching al'e undel' intense R&D investigation by both academics and industl"ies. They provide high performance such as fast wl'ite/read speed, low power and good enduJ"ance (e.g. >10 12 ) beyond Flash memOl·ies. Howevel' the conventional access architecture based on 1 transistor + 1 memOl'y cell limits its storage density as the selection tJ"ansistol' should be lal'ge enough to enSut'e enough CutTent fOl' the switching opeJ"ation, This papel' describes a design of crossbar al'chitecture based on 2R complementary I'esistive switching memol'y cell, This at'chitectut'e allows fewel' selection transistOl's, and minimum contacts between memory cells and CMOS control circuits, The complementary cell and pat'allel data sensing mitigate the impact of sneak CutTents in the crossbar architectut'e, We performed transient simulations based on two memOl), technologies: STT-MRAM and OxRRAM to validate the functionality of this design by using CMOS 65 nm design kit and memOl), compact models,

Compact Modeling Solutions for Oxide-Based Resistive Switching Memories (OxRAM)

“…These models have been successfully used to simulate new MOS-RRAM cells like a NVM flip-flop [25], Non-Volatile SRAM [26] and OxRAM memory array [27]. [16] In this section, an investigation in the impact of OxRAM variability on the memory array performances is proposed [16].…”

“…The model presented before has allowed us to assess the robustness of sense towards the variability of OxRAM or CMOS transistors [26]; and the validated complete crossbar architecture based on 2R complementary [27]. Figure 12.…”

“…Pre-Charged Sense Amplifier for data sensing. It consists of a pre-charge sub-circuit (MPC0, MPC1), a pair of inverters (MNA0-1, MPA0-1), which act as an amplifier [26,27]. Figure 13.…”