Current Stress Reduction for DC-Link Capacitors of Three-Phase VSI With Carrier-Based Continuous PWM

Nishizawa, Koroku; Itoh, Jun‐ichi; Odaka, Akihiro; Toba, Akio; Umida, Hidetoshi; Fujita, Satoru

doi:10.1109/tia.2019.2932701

Cited by 11 publications

(11 citation statements)

References 18 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…As observed from Figure 7, the dc-link current fluctuations with the proposed optimal TSVPWM strategy are always less than those with the conventional SVPWM and CPWM in Ref. [23] under different speeds, which fits with the results of the theoretical analysis in Figure 2. For example, when the motor is operated at 2000 rpm with the power factor of 0.94, the rms value of the capacitor current can be reduced by 37% at this case using the proposed strategy relative to the conventional SVPWM, as shown in Figure 7a.…”

Section: The Reduction Of Dc-link Capacitor Currentsupporting

confidence: 81%

“…By referring to Refs. [12,23], i bat is the function of the modulation index M, the amplitude of the stator current I s and the power-factor angle φ, which can be deduced as the following equation:…”

Section: Calculation Of Dc-link Capacitor Current Fluctuation With Th...mentioning

confidence: 99%

“…Furthermore, in order to verify the switching loss reduction effect, Figure 8 shows the waveforms of u-phase terminal voltage and u-phase current at rated speed and rated load with cos φ = 0.94 with the proposed optimal TSVPWM strategy and the typical SVPWM and CPWM in Ref. [23]. It can be found that the u-phase leg is clamped to the positive dc-link at the positive current maximum and is clamped to the negative dc-link at the reverse current maximum.…”

Section: The Switching Loss Reduction and Output Current Harmonicsmentioning

confidence: 99%

“…But it is not optimised according to the load current phase, which leads to its performance deterioration as the power factor changes. In order to solve this problem, the optimisation of inverter input current harmonics in a wide range of the load power factor is achieved by changing the optimised combinations of the voltage space vectors according to the polarities of the output phase currents [23,24]. In particular, the proposed CPWM in Ref.…”

Section: Introductionmentioning

confidence: 99%

“…In particular, the proposed CPWM in Ref. [23] reduces the dc‐link current harmonics by shifting output voltage references in every half control period and adjusting the gate pulse timings in the control period. However, these methods are proposed intuitively, only the experimental results prove to be effective without proving its optimality.…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Current fluctuations reduction strategy based on optimal three‐space‐vector pulse‐width modulation for service‐life improvement of DC‐link electrolytic capacitors in three‐phase voltage‐source inverter system

Li,

Shen,

Tang

et al. 2023

IET Electric Power Appl

View full text Add to dashboard Cite

The authors propose a current fluctuation reduction strategy based on optimal three‐space‐vector pulse‐width modulation (TSVPWM), which is used to improve the service‐life of the dc‐link electrolytic capacitors in two‐level three‐phase voltage‐source inverter (VSI) system. Differing from the typical SVPWM‐based method that employs two adjacent active voltage vectors and zero voltage vectors to synthesise the reference voltage, the proposed strategy selects the required voltage vectors based on the minimum dc‐link electrolytic capacitor current fluctuation. With the proposed strategy, an objective function for the root‐mean‐square value of dc‐link electrolytic capacitor current is first constructed under the constraint of eight permissible voltage vectors. And then, by solving the minimum of the objective function through the piecewise linear programming, the optimal three voltage vectors under the different modulation ratios and load power factors are obtained accordingly, so as to achieve the minimum dc‐link electrolytic capacitor current fluctuations during each switching period. Meanwhile, a PWM implementation scheme based on positive–negative double carrier signals is presented, which not only simplifies the implementation process but also effectively reduces the switching losses of power devices. Finally, the experimental results demonstrate that the proposed strategy can minimise the dc‐link electrolytic capacitor current fluctuation under different working conditions.

show abstract

Section: The Reduction Of Dc-link Capacitor Currentsupporting

confidence: 81%

Section: Calculation Of Dc-link Capacitor Current Fluctuation With Th...mentioning

confidence: 99%

Section: The Switching Loss Reduction and Output Current Harmonicsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Current fluctuations reduction strategy based on optimal three‐space‐vector pulse‐width modulation for service‐life improvement of DC‐link electrolytic capacitors in three‐phase voltage‐source inverter system

Li,

Shen,

Tang

et al. 2023

IET Electric Power Appl

View full text Add to dashboard Cite

show abstract

Analysis and Calculation of the Capacitor Current and Voltage Ripples for Z-Source Inverters

Dong

Lin

et al. 2022

Lecture Notes in Electrical Engineering

View full text Add to dashboard Cite

Current Stress Reduction for DC-Link Capacitors of Three-Phase VSI With Carrier-Based Continuous PWM

Cited by 11 publications

References 18 publications

Current fluctuations reduction strategy based on optimal three‐space‐vector pulse‐width modulation for service‐life improvement of DC‐link electrolytic capacitors in three‐phase voltage‐source inverter system

Current fluctuations reduction strategy based on optimal three‐space‐vector pulse‐width modulation for service‐life improvement of DC‐link electrolytic capacitors in three‐phase voltage‐source inverter system

Analysis and Calculation of the Capacitor Current and Voltage Ripples for Z-Source Inverters

Optimal switching sequence control for current stress reduction of DC-link capacitors in dual-three phase PMSM drives

Contact Info

Product

Resources

About