Delay budgeting in sequential circuit with application on FPGA placement

Yeh, Chao-Yang; Marek-Sadowska, Malgorzata

doi:10.1145/775884.775886

Cited by 5 publications

(23 citation statements)

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“…In [26], a novel technique for netweighting algorithm is proposed for timing optimization in placement. Recently, in [6], a new technique for delay budgeting on sequential circuits is proposed.…”

Section: Related Workmentioning

confidence: 99%

A Unified Theory of Timing Budget Management

Ghiasi¹,

Bozorgzadeh

Huang

et al. 2006

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Section: Related Workmentioning

confidence: 99%

A Unified Theory of Timing Budget Management

Ghiasi¹,

Bozorgzadeh

Huang

et al. 2006

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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show abstract

“…Timing-driven placement is a technique to improve a circuit's speed. Several approaches for timing-driven placement have been proposed, one of which involves net budgeting [5][2] [9]. For an expected clock period defined by a user, budgeting converts the path timing constraints into timing (or length) upper bounds for nets.…”

Section: Introductionmentioning

confidence: 99%

“…While most of the previous delay-budgeting works have been focused on optimizing combinational circuits, the work in [9] introduces sequential budgeting, which combines budgeting and retiming to optimize sequential circuits better. However, the formulation in [9] does not consider flip-flop (FF) minimization, which is important in practical applications. Here, we propose a new sequential budgeting algorithm, C-SBGT, that not only controls the FF count, but also can be solved more efficiently compared to [9].…”

mentioning

confidence: 99%

“…However, the formulation in [9] does not consider flip-flop (FF) minimization, which is important in practical applications. Here, we propose a new sequential budgeting algorithm, C-SBGT, that not only controls the FF count, but also can be solved more efficiently compared to [9]. Our formulation has fewer constraints than [9] and the procedure to realize retiming is also simpler.…”

mentioning

confidence: 99%

“…Here, we propose a new sequential budgeting algorithm, C-SBGT, that not only controls the FF count, but also can be solved more efficiently compared to [9]. Our formulation has fewer constraints than [9] and the procedure to realize retiming is also simpler. Our experiments show that our new min-area sequential budgeting algorithm produces a good trade-off between the area and budgeting optimization goals, as well as improving the timing of previous sequential budgeting method by 12%.…”

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confidence: 99%

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Minimum-area sequential budgeting for FPGA

Yeh

Marek-Sadowska

2003

ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486)

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The constraint-based approach to timing-driven placement requires delay budgeting to define the delay upper bounds for nets. While most of the previous delay-budgeting works have been focused on optimizing combinational circuits, the work in [9] introduces sequential budgeting, which combines budgeting and retiming to optimize sequential circuits better. However, the formulation in [9] does not consider flip-flop (FF) minimization, which is important in practical applications. Here, we propose a new sequential budgeting algorithm, C-SBGT, that not only controls the FF count, but also can be solved more efficiently compared to [9]. Our formulation has fewer constraints than [9] and the procedure to realize retiming is also simpler. Our experiments show that our new min-area sequential budgeting algorithm produces a good trade-off between the area and budgeting optimization goals, as well as improving the timing of previous sequential budgeting method by 12%.

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Simultaneous slack budgeting and retiming for synchronous circuits optimization

Liu

Hong

et al. 2010

2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC)

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-With the challenges of growing functionality and scaling chip size, the possible performance improvements should be considered in the earlier IC design stages, which gives more freedom to the later optimization. Potential slack as an effective metric of possible performance improvements is considered in this work which, as far as we known, is the first work that maximizes the potential slack by retiming for synchronous sequential circuit. A simultaneous slack budgeting and incremental retiming algorithm is proposed for maximizing potential slack. The overall slack budget is optimized by relocating the FFs iteratively with the MIS-based slack estimation. Compared with the potential slack of a well-known min-period retiming, our algorithm improves potential slack averagely 19.6% without degrading the circuit performance in reasonable runtime. Furthermore, at the expense of a small amount of timing performance, 0.52% and 2.08%, the potential slack is increased averagely by 19.89% and 28.16% separately, which give a hint of the tradeoff between the timing performance and the slack budget. I IntroductionWith the coming up of SoC (system on a chip) and SiP (system in a package), more and more devices trend to be put in the small silicon area while at the same time the clock frequency is pushed even higher. Thus timing, area, and power dissipation, which are the three major design objectives, become even more challenging in modern circuit design. Typically, the goal of performance optimization is either to minimize the clock period within a given area and/or power budget [1][2][3], or to minimize their area and/or power dissipation under timing constraints [4][5][6][7][8][9][10]. Particularly, timing budget is often performed in order to slow down as many components as possible without violating the system's timing constraints. The slowed-down components can be further optimized to improve system's area, power dissipation, or other design quality metrics.For timing-constrained gate-level synthesis, time slack is an effective metric of circuit's potential performance improvement. The slack budgeting problem on a graph has been studied in theory and practice for many different applications, such as timing-driven placement [16][17] budgeting through LP relaxation. [23] proposed combinatorial methods based on net flow approach to handle the slack budget problem. However, the existing slack budgeting algorithms are either used for combinatorial circuit, or limited to fixed FF locations. At the early design stages, there is flexibility to schedule pipeline or timing distribution to obtain more timing slack.As one of the most powerful sequential optimization techniques, retiming was first proposed by Leiserson and Saxe in 1983 [24], which relocates the flip-flops (FFs) in a circuit while preserving its functionality. The past twenty years saw retiming's effectiveness on improving circuits' timing, area, and power characteristics. Recent publications [1] and [3] proposed a very efficient retiming algorithm for min...

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Delay budgeting in sequential circuit with application on FPGA placement

Cited by 5 publications

References 0 publications

A Unified Theory of Timing Budget Management

A Unified Theory of Timing Budget Management

Minimum-area sequential budgeting for FPGA

Simultaneous slack budgeting and retiming for synchronous circuits optimization

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